{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:20:50Z","timestamp":1729632050208,"version":"3.28.0"},"reference-count":26,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,10]]},"DOI":"10.1109\/iccd.2011.6081428","type":"proceedings-article","created":{"date-parts":[[2011,11,21]],"date-time":"2011-11-21T21:47:00Z","timestamp":1321912020000},"page":"388-395","source":"Crossref","is-referenced-by-count":13,"title":["The DIMM tree architecture: A high bandwidth and scalable memory system"],"prefix":"10.1109","author":[{"given":"Kanit","family":"Therdsteerasukdi","sequence":"first","affiliation":[]},{"given":"Gyung-Su","family":"Byun","sequence":"additional","affiliation":[]},{"given":"Jeremy","family":"Ir","sequence":"additional","affiliation":[]},{"given":"Glenn","family":"Reinman","sequence":"additional","affiliation":[]},{"given":"Jason","family":"Cong","sequence":"additional","affiliation":[]},{"given":"M.F.","family":"Chang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Inphi LRDIMM Isolation Memory Buffer (iMB&#x2122;) Component","year":"0","key":"ref10"},{"key":"ref11","first-page":"391","author":"jacob","year":"2008","journal-title":"Memory Systems Cache DRAM Disk"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.837964"},{"key":"ref13","article-title":"An RF\/Baseband FDMA-Interconnect Transceiver for Reconfigurable Multiple Access Chip-to-Chip Communication","author":"ko","year":"2005","journal-title":"2005 IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/4.782091"},{"key":"ref15","article-title":"Memory bandwidth and machine balance in current high performance computers","author":"mccalpin","year":"1995","journal-title":"IEEE Computer Society Technical Committee on Computer Architecture (TCCA) Newsletter"},{"journal-title":"Micron 1Gb x4 x8 x16 DDR3 SDRAM Features","year":"2006","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2008.4672166"},{"key":"ref18","article-title":"Effective Management of DRAM Bandwidth in Multicore Processors","author":"rafique","year":"2007","journal-title":"PACT"},{"journal-title":"Pin A binary instrumentation tool for computer architecture research and education","year":"2004","author":"reddi","key":"ref19"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2011.5746409"},{"key":"ref3","article-title":"The Simplescalar Tool Set","author":"burger","year":"1997","journal-title":"version 2 0 Technical Report CS-TR-97-1342"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2005.850699"},{"journal-title":"Cadence Virtuoso Spectre Circuit Simulator","year":"0","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031527"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346190"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815978"},{"journal-title":"SPEC CPU2006 Benchmark Descriptions","year":"2006","author":"henning","key":"ref9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1364\/OE.15.003916"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"281","DOI":"10.4310\/CMS.2008.v6.n2.a2","article-title":"Multiscale hierarchical decomposition of images with applications to deblurring, denoising and segmentation","volume":"6","author":"tadmor","year":"2008","journal-title":"Commun Math Sci"},{"journal-title":"DRAMsim A Memory System Simulator","year":"2006","author":"wang","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/s00339-009-5162-x"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1023\/B:JMIV.0000011316.54027.6a"},{"key":"ref23","article-title":"Corona: System Implications of Emerging Nanophotonic Technology","author":"vantrease","year":"2008","journal-title":"Proceedings of ISCA-35"},{"key":"ref26","article-title":"Nonlinear elastic registration with unbiased regularization in three dimensions","author":"yanovsky","year":"2008","journal-title":"MICCAI 2008 Workshop Proceedings Computational Biomechanics for Medicine III"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/216585.216588"}],"event":{"name":"2011 IEEE 29th International Conference on Computer Design (ICCD 2011)","start":{"date-parts":[[2011,10,9]]},"location":"Amherst, MA, USA","end":{"date-parts":[[2011,10,12]]}},"container-title":["2011 IEEE 29th International Conference on Computer Design (ICCD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6066261\/6081363\/06081428.pdf?arnumber=6081428","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T10:07:23Z","timestamp":1497953243000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6081428\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,10]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/iccd.2011.6081428","relation":{},"subject":[],"published":{"date-parts":[[2011,10]]}}}