{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,30]],"date-time":"2025-10-30T22:27:43Z","timestamp":1761863263057,"version":"3.28.0"},"reference-count":30,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/iccd.2013.6657024","type":"proceedings-article","created":{"date-parts":[[2013,11,11]],"date-time":"2013-11-11T22:22:16Z","timestamp":1384208536000},"page":"47-53","source":"Crossref","is-referenced-by-count":42,"title":["Statistical analysis and modeling for error composition in approximate computation circuits"],"prefix":"10.1109","author":[{"given":"Wei-Ting J.","family":"Chan","sequence":"first","affiliation":[]},{"given":"Andrew B.","family":"Kahng","sequence":"additional","affiliation":[]},{"given":"Seokhyeong","family":"Kang","sequence":"additional","affiliation":[]},{"given":"Rakesh","family":"Kumar","sequence":"additional","affiliation":[]},{"given":"John","family":"Sartori","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.1274006"},{"key":"17","first-page":"921","article-title":"Combined Word-length Optimization and High-level Synthesis of Digital Signal Processing Systems","volume":"20","author":"kum","year":"2001","journal-title":"IEEE TCAD"},{"key":"18","first-page":"837","article-title":"MiniBit: Bitwidth Optimization via Affine Arithmetic","author":"lee","year":"0","journal-title":"Proc DAC 2005"},{"key":"15","article-title":"Adding Faster With Application Specific Early Termination","author":"koes","year":"2005","journal-title":"CMU Research Showcase"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2011.51"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1145\/1878921.1878948"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090829"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/2160916.2160949"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228509"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429542"},{"journal-title":"Mathworks Matlab","year":"0","key":"20"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915108"},{"key":"23","first-page":"957","article-title":"Approximate Logic Synthesis for Error Tolerant Applications","author":"shin","year":"0","journal-title":"Proc DATE 2010"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1145\/349299.349317"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105401"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403679"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228504"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2008.930649"},{"key":"29","first-page":"1225","article-title":"Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing","volume":"18","author":"zhu","year":"2010","journal-title":"IEEE TVLSI"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837411"},{"key":"2","article-title":"Variable Precision Analysis for FPGA Synthesis","author":"chang","year":"0","journal-title":"Nasa Earth Science Technology Conference 2003"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228450"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2002.1106677"},{"key":"30","first-page":"97","article-title":"Approximate Signed Binary Integer Multipliers for Arithmetic Data Value Speculation","author":"kelly","year":"0","journal-title":"Proc DASIP 2009"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2011.5993675"},{"key":"6","first-page":"275","article-title":"Effcient Static Analysis of Fixed-Point Error in DSP Applications via Affine Arithmetic Modeling","author":"fang","year":"0","journal-title":"Proc ICCAD 2003"},{"key":"5","article-title":"New Quality Metrics for Multimedia Compression Using Faulty Hardware","author":"chong","year":"0","journal-title":"Proc International Workshop on Video Processing and Quality Metrics for Consumer Electronics 2006"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024863"},{"key":"9","article-title":"Analytic Error Modeling for Imprecise Arithmetic Circuits","author":"huang","year":"0","journal-title":"Proc SELSE 2011"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2011.5722256"}],"event":{"name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","start":{"date-parts":[[2013,10,6]]},"location":"Asheville, NC, USA","end":{"date-parts":[[2013,10,9]]}},"container-title":["2013 IEEE 31st International Conference on Computer Design (ICCD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6644329\/6657009\/06657024.pdf?arnumber=6657024","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T02:16:13Z","timestamp":1490235373000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6657024\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/iccd.2013.6657024","relation":{},"subject":[],"published":{"date-parts":[[2013,10]]}}}