{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,5]],"date-time":"2025-10-05T04:13:19Z","timestamp":1759637599346,"version":"3.28.0"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/iccd.2013.6657071","type":"proceedings-article","created":{"date-parts":[[2013,11,11]],"date-time":"2013-11-11T17:22:16Z","timestamp":1384190536000},"page":"396-403","source":"Crossref","is-referenced-by-count":25,"title":["Equivalence checking of partial designs using dependency quantified Boolean formulae"],"prefix":"10.1109","author":[{"given":"Karina","family":"Gitina","sequence":"first","affiliation":[]},{"given":"Sven","family":"Reimer","sequence":"additional","affiliation":[]},{"given":"Matthias","family":"Sauer","sequence":"additional","affiliation":[]},{"given":"Ralf","family":"Wimmer","sequence":"additional","affiliation":[]},{"given":"Christoph","family":"Scholl","sequence":"additional","affiliation":[]},{"given":"Bernd","family":"Becker","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"2005","author":"mishchenko","journal-title":"FRAIGs A unifying representation for logic synthesis and verification","key":"19"},{"doi-asserted-by":"publisher","key":"17","DOI":"10.1007\/978-1-4899-5327-8_25"},{"key":"18","doi-asserted-by":"crossref","first-page":"957","DOI":"10.1016\/S0898-1221(00)00333-3","article-title":"Lower bounds for multiplayer non-cooperative games of incomplete information","volume":"41","author":"azhar","year":"2001","journal-title":"Journal of Computers and Mathematics with Applications"},{"key":"15","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1007\/978-3-642-14295-6_5","article-title":"ABC: An academic industrial-strength verification tool","volume":"6174","author":"brayton","year":"2010","journal-title":"Lecture Notes in Computer Science"},{"key":"16","first-page":"59","article-title":"Resolve and expand","volume":"3542","author":"biere","year":"2004","journal-title":"LNCS"},{"doi-asserted-by":"publisher","key":"13","DOI":"10.1145\/378239.378470"},{"doi-asserted-by":"publisher","key":"14","DOI":"10.1145\/1837274.1837318"},{"doi-asserted-by":"publisher","key":"11","DOI":"10.1007\/978-3-540-32275-7_20"},{"doi-asserted-by":"publisher","key":"12","DOI":"10.1007\/978-3-642-31612-8_11"},{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/ICCD.2002.1106748"},{"doi-asserted-by":"publisher","key":"20","DOI":"10.1109\/FMCAD.2006.4"},{"key":"2","first-page":"290","article-title":"Approximate symbolic model checking for incomplete designs","volume":"3312","author":"nopper","year":"2004","journal-title":"LNCS"},{"key":"1","first-page":"238","article-title":"Checking equivalence for partial implementations","author":"scholl","year":"2001","journal-title":"Design Automation Conference (DAC)"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1145\/368273.368557"},{"key":"7","first-page":"61","article-title":"Equivalence checking for partial designs revisited","author":"gitina","year":"2013","journal-title":"Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation Von Schaltungen Und Systemen"},{"key":"6","first-page":"167","article-title":"Some remarks on infinitely long formulas","author":"henkin","year":"1961","journal-title":"Infinitistic Methods Proceedings of the 1959 Symposium on Foundations of Mathematics"},{"key":"5","first-page":"273","article-title":"Computation of minimal counterexamples by using black box techniques and symbolic methods","author":"nopper","year":"2007","journal-title":"Int'l Conf On Computer-Aided Design (ICCAD)"},{"key":"4","doi-asserted-by":"crossref","first-page":"37","DOI":"10.1109\/MTV.2006.3","article-title":"Advanced SAT-techniques for bounded model checking of blackbox designs","author":"herbstritt","year":"2006","journal-title":"Int'l Workshop on Microprocessor Test and Verification (MTV)"},{"doi-asserted-by":"publisher","key":"9","DOI":"10.1016\/S0004-3702(02)00373-9"},{"key":"8","article-title":"A DPLL algorithm for solving DQBF","author":"fro?hlich","year":"0","journal-title":"Int'l Workshop on Pragmatics of SAT (POS) 2012"}],"event":{"name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","start":{"date-parts":[[2013,10,6]]},"location":"Asheville, NC, USA","end":{"date-parts":[[2013,10,9]]}},"container-title":["2013 IEEE 31st International Conference on Computer Design (ICCD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6644329\/6657009\/06657071.pdf?arnumber=6657071","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T21:45:56Z","timestamp":1498081556000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6657071\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/iccd.2013.6657071","relation":{},"subject":[],"published":{"date-parts":[[2013,10]]}}}