{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,7]],"date-time":"2026-02-07T05:05:43Z","timestamp":1770440743539,"version":"3.49.0"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,10]]},"DOI":"10.1109\/iccd.2014.6974717","type":"proceedings-article","created":{"date-parts":[[2014,12,8]],"date-time":"2014-12-08T22:29:51Z","timestamp":1418077791000},"page":"440-447","source":"Crossref","is-referenced-by-count":35,"title":["Fair share: Allocation of GPU resources for both performance and fairness"],"prefix":"10.1109","author":[{"given":"Paula","family":"Aguilera","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Katherine","family":"Morrow","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nam Sung","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","year":"0","journal-title":"StoreGPU"},{"key":"17","year":"2007","journal-title":"NVIDIA Image Denoising"},{"key":"18","year":"0","journal-title":"Maxime Ray Tracing"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1145\/1383422.1383443"},{"key":"16","author":"obukhov","year":"2008","journal-title":"Discrete Cosine Transform for 8x8 Blocks with CUDA"},{"key":"13","article-title":"Dynamic heterogeneous scheduling decisions using historical runtime data","author":"gregg","year":"2011","journal-title":"A4MMC"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ICSPC.2007.4728256"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736058"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"key":"3","article-title":"TimeGraph: Gpu scheduling for real-Time multi-Tasking environments","author":"kato","year":"2011","journal-title":"USENIX"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"2","year":"0","journal-title":"NVIDIA's Next Generation CUDA Compute Architecture KeplerGK110"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6168946"},{"key":"10","doi-asserted-by":"crossref","DOI":"10.1145\/1086297.1086320","article-title":"Architectural support for real-Time task scheduling in smt processors","author":"cazorla","year":"2005","journal-title":"CASES"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/1810085.1810113"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/2588768.2576780"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742976"},{"key":"4","article-title":"Graphic engine resource management","author":"bautin","year":"2008","journal-title":"MMCN"},{"key":"9","article-title":"Fair cache sharing and partitioning in a chip multiprocessor architecture","author":"kim","year":"2004","journal-title":"PACT"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.24"}],"event":{"name":"2014 32nd IEEE International Conference on Computer Design (ICCD)","location":"Seoul, South Korea","start":{"date-parts":[[2014,10,19]]},"end":{"date-parts":[[2014,10,22]]}},"container-title":["2014 IEEE 32nd International Conference on Computer Design (ICCD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6964907\/6974646\/06974717.pdf?arnumber=6974717","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,7,30]],"date-time":"2023-07-30T14:40:06Z","timestamp":1690728006000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6974717"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,10]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/iccd.2014.6974717","relation":{},"subject":[],"published":{"date-parts":[[2014,10]]}}}