{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T20:35:58Z","timestamp":1730234158822,"version":"3.28.0"},"reference-count":31,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,10]]},"DOI":"10.1109\/iccd.2015.7357168","type":"proceedings-article","created":{"date-parts":[[2015,12,17]],"date-time":"2015-12-17T21:57:06Z","timestamp":1450389426000},"page":"581-588","source":"Crossref","is-referenced-by-count":7,"title":["Realizing complexity-effective on-chip power delivery for many-core platforms by exploiting optimized mapping"],"prefix":"10.1109","author":[{"given":"Mohammad Khavari","family":"Tavana","sequence":"first","affiliation":[]},{"given":"Divya","family":"Pathak","sequence":"additional","affiliation":[]},{"given":"Mohammad Hossein","family":"Hajkazemi","sequence":"additional","affiliation":[]},{"given":"Maria","family":"Malik","sequence":"additional","affiliation":[]},{"given":"Ioannis","family":"Savidis","sequence":"additional","affiliation":[]},{"given":"Houman","family":"Homayoun","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"article-title":"Practical optimization: a gentle introduction","year":"2004","author":"chinneck","key":"ref31"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.023"},{"key":"ref10","first-page":"275","article-title":"Energy-efficient mapping of biomedical applications on domain-specific accelerator under process variation","author":"tavana","year":"2014","journal-title":"In Proceedings of the International Symposium on Low Power Electronics and Design"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488734"},{"year":"0","key":"ref12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744833"},{"key":"ref14","first-page":"1","article-title":"The 12-Core POWER8™ Processor with 7.6 Tb\/s 10 Bandwidth, Integrated Voltage Regulation, and Resonant Clocking","volume":"50","author":"fluhr","year":"2015","journal-title":"IEEE Journal of So lid-State Circuits"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2014.10"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/1952998.1952999"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2012.2230408"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1394608.1382152"},{"key":"ref19","first-page":"102","article-title":"An integrated quadcore Opteron processor","author":"dorsey","year":"2007","journal-title":"ISSCC Session 5 Microprocessors"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2190539"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749712"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6169034"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108121"},{"key":"ref6","first-page":"123","article-title":"System level analysis of fast, per-core DVFS using on-chip switching regulators","author":"kim","year":"2008","journal-title":"IEEE 14th International Symposium on High Performance Computer Architecture"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2015.7273518"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2007.375263"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2257900"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2169309"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2013772"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090776"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2080550"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/40.888701"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837483"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2007.913186"},{"year":"0","key":"ref23"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2010.14"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2010.2062192"}],"event":{"name":"2015 33rd IEEE International Conference on Computer Design (ICCD)","start":{"date-parts":[[2015,10,18]]},"location":"New York City, NY, USA","end":{"date-parts":[[2015,10,21]]}},"container-title":["2015 33rd IEEE International Conference on Computer Design (ICCD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7347055\/7357071\/07357168.pdf?arnumber=7357168","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,25]],"date-time":"2017-03-25T01:47:57Z","timestamp":1490406477000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7357168\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10]]},"references-count":31,"URL":"https:\/\/doi.org\/10.1109\/iccd.2015.7357168","relation":{},"subject":[],"published":{"date-parts":[[2015,10]]}}}