{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T19:51:13Z","timestamp":1729626673185,"version":"3.28.0"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,1]]},"DOI":"10.1109\/icce.2016.7430612","type":"proceedings-article","created":{"date-parts":[[2016,3,14]],"date-time":"2016-03-14T16:24:27Z","timestamp":1457972667000},"page":"275-278","source":"Crossref","is-referenced-by-count":5,"title":["Efficient implementation of BCH decoders on GPU for flash memory devices using iBMA"],"prefix":"10.1109","author":[{"given":"Arul K.","family":"Subbiah","sequence":"first","affiliation":[]},{"given":"Tokunbo","family":"Ogunfunmi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/12.485570"},{"key":"ref3","article-title":"Error Control Coding","author":"shu","year":"2004","journal-title":"Pearson Education Inc"},{"key":"ref6","article-title":"Small area parallel chein search architectures for long BCH codes","volume":"12","author":"chen","year":"2004","journal-title":"IEEE Trans on Very Large Scale Integr (VLSI) Systems"},{"article-title":"Design of VHDL based synthesis tool for BCH codes","year":"1997","author":"jamro","key":"ref5"},{"journal-title":"Nvidia","article-title":"NVIDIA CUDA C Programming guide Version 4.2","year":"2012","key":"ref8"},{"key":"ref7","article-title":"Strength-reduced parallel chein search architecture for strong BCH codes","volume":"55","author":"cho","year":"2008","journal-title":"IEEE Transactions on Circuits and Systems-II Express Briefs"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/WCSP.2013.6677084"},{"key":"ref9","article-title":"Evolving throughput driven architecture for error correction in NAND memory","volume":"1","author":"subbiah","year":"2010","journal-title":"DesignCon"},{"key":"ref1","first-page":"76","article-title":"On decoding implementation of regular LDPC Code based On CUDA","volume":"4","author":"yu","year":"2010","journal-title":"Computer Applications and Software"}],"event":{"name":"2016 IEEE International Conference on Consumer Electronics (ICCE)","start":{"date-parts":[[2016,1,7]]},"location":"Las Vegas, NV, USA","end":{"date-parts":[[2016,1,11]]}},"container-title":["2016 IEEE International Conference on Consumer Electronics (ICCE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7424905\/7430494\/7430612.pdf?arnumber=7430612","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T22:12:43Z","timestamp":1475187163000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7430612\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,1]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/icce.2016.7430612","relation":{},"subject":[],"published":{"date-parts":[[2016,1]]}}}