{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,1]],"date-time":"2026-02-01T06:56:02Z","timestamp":1769928962036,"version":"3.49.0"},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,10,20]],"date-time":"2023-10-20T00:00:00Z","timestamp":1697760000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,10,20]],"date-time":"2023-10-20T00:00:00Z","timestamp":1697760000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,10,20]]},"DOI":"10.1109\/icceic60201.2023.10426736","type":"proceedings-article","created":{"date-parts":[[2024,2,13]],"date-time":"2024-02-13T23:35:26Z","timestamp":1707867326000},"page":"216-220","source":"Crossref","is-referenced-by-count":1,"title":["Low-Jitter Retimer Circuits for High-Performance Computer Optical Communications"],"prefix":"10.1109","author":[{"given":"Qing","family":"Liu","sequence":"first","affiliation":[{"name":"Air Force Engineering University,Air and Missile Defense College,Xi’an,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Heming","family":"Wang","sequence":"additional","affiliation":[{"name":"Air Force Engineering University,Air and Missile Defense College,Xi’an,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fangxu","family":"Lv","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,School of Computer,Changsha,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Geng","family":"Zhang","sequence":"additional","affiliation":[{"name":"National University of Defense Technology,School of Computer,Changsha,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dongbin","family":"Lv","sequence":"additional","affiliation":[{"name":"Unit 66029 of PLA, Xilin Gol League,China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2019.8662482"},{"issue":"04","key":"ref2","first-page":"21","article-title":"High-Speed PAM4 Clock and Data Recovery Techniques for 5G Communications","volume":"24","author":"Liao","year":"2018","journal-title":"J. ZTE Technology"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2010.2077350"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2003.818576"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2013.2239013"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2002.993000"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.3390\/electronics11182864"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/icicm56102.2022.10011246"},{"issue":"03","key":"ref9","first-page":"1","article-title":"Modeling analysis and circuit design of second-order clock data recovery circuit applied to 10 Gbase-KR","volume":"37","author":"Luan","year":"2020","journal-title":"J. Microelectronics and Computers"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2003.810045"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1494044"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2006.875292"},{"issue":"06","key":"ref13","first-page":"817","article-title":"A Low Noise Clock Generator for High Speed Serial Interface","volume":"49","author":"Xin","year":"2019","journal-title":"J. Microelectronics"},{"key":"ref14","volume-title":"Design of COMS Integrated Phase Locked Loop Circuit","author":"Zhang","year":"2013"},{"key":"ref15","article-title":"Research and design of fast-locked, high-speed and lowjitter clock generation","author":"Yang","year":"2015","journal-title":"D. University of Electronic Science and Technology of China"}],"event":{"name":"2023 4th International Conference on Computer Engineering and Intelligent Control (ICCEIC)","location":"Guangzhou, China","start":{"date-parts":[[2023,10,20]]},"end":{"date-parts":[[2023,10,22]]}},"container-title":["2023 4th International Conference on Computer Engineering and Intelligent Control (ICCEIC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10424971\/10426625\/10426736.pdf?arnumber=10426736","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,14]],"date-time":"2024-03-14T01:13:28Z","timestamp":1710378808000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10426736\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,10,20]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/icceic60201.2023.10426736","relation":{},"subject":[],"published":{"date-parts":[[2023,10,20]]}}}