{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T09:03:01Z","timestamp":1729674181853,"version":"3.28.0"},"reference-count":27,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,11]]},"DOI":"10.1109\/iccsce.2014.7072752","type":"proceedings-article","created":{"date-parts":[[2015,4,3]],"date-time":"2015-04-03T15:53:17Z","timestamp":1428076397000},"page":"399-404","source":"Crossref","is-referenced-by-count":1,"title":["A comparative study on the implementation of reversible Binary Coded Decimal (BCD) Adder performance on Field Programmable Gate array (FPGA)"],"prefix":"10.1109","author":[{"given":"Nyap Tet Clement","family":"Tham","sequence":"first","affiliation":[]},{"given":"Alpha Agape","family":"Gopalaiy","sequence":"additional","affiliation":[]},{"given":"Lenin","family":"Gopal","sequence":"additional","affiliation":[]},{"given":"Ashutosh K.","family":"Singh","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2010.2040930"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1364\/ON.11.2.000011"},{"key":"ref12","first-page":"632","article-title":"Reversible Computing","volume":"84","author":"toffoli","year":"1980","journal-title":"Technical Memo MIT\/LCS\/TM-151"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/BF01857727"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.32.3266"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2491682"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS.2006.342478"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2008.04.003"},{"key":"ref18","first-page":"2","article-title":"Design of a reversible logic block of field programmable gate array","author":"sayem","year":"2009","journal-title":"Silver Jubilee Conference on Communication Technologies and VLSI Design"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/CSAE.2011.5952845"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-008-5078-y"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2003.1183443"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1016\/j.optlastec.2009.06.017"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1147\/rd.176.0525"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1147\/rd.53.0183"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2003.1207666"},{"key":"ref7","article-title":"Cramming more components onto integrated circuits","volume":"3","author":"moore","year":"1965","journal-title":"Journal of Electronics"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-007-5042-2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/368518.368529"},{"journal-title":"Quantum Computation and Quantum Information","year":"2000","author":"nielsen","key":"ref1"},{"key":"ref20","first-page":"787","article-title":"Design and optimization of reversible BCD adder\/subtractor circuit for quantum and nanotechnology based systems","volume":"4","author":"mohammadi","year":"2008","journal-title":"World Applied Sciences Journal"},{"key":"ref22","first-page":"1793","article-title":"Realization of BCD adder using Reversible Logic","volume":"2","author":"christina","year":"2010","journal-title":"International Journal of Computer Theory and Engineering"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2007.12.006"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4020-8919-0_9"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ADCOM.2007.94"},{"key":"ref26","doi-asserted-by":"crossref","first-page":"272","DOI":"10.1016\/j.sysarc.2005.05.005","article-title":"Design of a compact reversible binary coded decimal adder circuit","volume":"52","author":"hasan babu","year":"2006","journal-title":"Journal of Systems Architecture"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1080\/00207217.2012.669716"}],"event":{"name":"2014 IEEE International Conference on Control System, Computing and Engineering (ICCSCE)","start":{"date-parts":[[2014,11,28]]},"location":"Penang, Malaysia","end":{"date-parts":[[2014,11,30]]}},"container-title":["2014 IEEE International Conference on Control System, Computing and Engineering (ICCSCE 2014)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7063839\/7072673\/07072752.pdf?arnumber=7072752","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T08:32:47Z","timestamp":1498206767000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7072752\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,11]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/iccsce.2014.7072752","relation":{},"subject":[],"published":{"date-parts":[[2014,11]]}}}