{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T21:23:37Z","timestamp":1730237017651,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,10,13]],"date-time":"2021-10-13T00:00:00Z","timestamp":1634083200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,10,13]],"date-time":"2021-10-13T00:00:00Z","timestamp":1634083200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,10,13]],"date-time":"2021-10-13T00:00:00Z","timestamp":1634083200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,10,13]]},"DOI":"10.1109\/icct52962.2021.9657879","type":"proceedings-article","created":{"date-parts":[[2022,1,4]],"date-time":"2022-01-04T15:36:39Z","timestamp":1641310599000},"page":"993-997","source":"Crossref","is-referenced-by-count":1,"title":["Design and Implementation of DSP Cache"],"prefix":"10.1109","author":[{"given":"Kunkun","family":"Liang","sequence":"first","affiliation":[]},{"given":"Jun","family":"Wu","sequence":"additional","affiliation":[]},{"given":"Haoqi","family":"Ren","sequence":"additional","affiliation":[]},{"given":"Zhifeng","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Bin","family":"Tan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/S1007-0214(09)70118-X"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2017.09.073"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1049\/cje.2015.01.001"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1504\/IJAAC.2021.113342"},{"key":"ref5","article-title":"Performance and energy efficiency analysis of Cache Memory Architecture in GPGPU[J]","volume":"11","year":"0","journal-title":"Int Conf on Future Information and Communication Engineering"},{"key":"ref8","article-title":"Design of an Intelligent Data Cache with Replacement Policy[J]","volume":"10","author":"shameedha begum","year":"2019","journal-title":"International Journal of Embedded and Real-Time Communication Systems (IJERTCS)"},{"key":"ref7","first-page":"1171","article-title":"Design of Reconfigurable Cache Memory Using Verilog HDL[C]\/\/2018 International Conference on Electrical, Electronics, Communication, Computer, and Optimization Techniques (ICEECCOT)","author":"manjunatha","year":"0","journal-title":"IEEE"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1587\/elex.15.20180674"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.3390\/math8020184"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.11648\/j.acis.20200803.11"}],"event":{"name":"2021 IEEE 21st International Conference on Communication Technology (ICCT)","start":{"date-parts":[[2021,10,13]]},"location":"Tianjin, China","end":{"date-parts":[[2021,10,16]]}},"container-title":["2021 IEEE 21st International Conference on Communication Technology (ICCT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9657830\/9657831\/09657879.pdf?arnumber=9657879","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T12:56:22Z","timestamp":1652187382000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9657879\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,10,13]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/icct52962.2021.9657879","relation":{},"subject":[],"published":{"date-parts":[[2021,10,13]]}}}