{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,30]],"date-time":"2026-03-30T12:07:54Z","timestamp":1774872474061,"version":"3.50.1"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,10,13]],"date-time":"2021-10-13T00:00:00Z","timestamp":1634083200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,10,13]],"date-time":"2021-10-13T00:00:00Z","timestamp":1634083200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,10,13]],"date-time":"2021-10-13T00:00:00Z","timestamp":1634083200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China under (NSFC)","doi-asserted-by":"publisher","award":["61831018,6163101"],"award-info":[{"award-number":["61831018,6163101"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,10,13]]},"DOI":"10.1109\/icct52962.2021.9658046","type":"proceedings-article","created":{"date-parts":[[2022,1,4]],"date-time":"2022-01-04T20:36:39Z","timestamp":1641328599000},"page":"695-699","source":"Crossref","is-referenced-by-count":11,"title":["Design and Verification of High Performance Memory Interface Based on AXI Bus"],"prefix":"10.1109","author":[{"given":"Ming","family":"Chen","sequence":"first","affiliation":[]},{"given":"Zhifeng","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Haoqi","family":"Ren","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"21","article-title":"Implementation of DDR multi-data channel based on FPGA [J]","volume":"16","author":"xiaoguang","year":"0","journal-title":"Journal of China Academy of Electronic Sciences"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CISP.2013.6743986"},{"key":"ref10","article-title":"Design of External Memory Access Interface for Reconstructible System Oriented to Communication Applications [D]","author":"ge","year":"2017","journal-title":"Southeast University"},{"key":"ref6","article-title":"Research and Design of High Performance Storage Interface Based on AMBA Bus Structure [D]","author":"jia","year":"2007","journal-title":"Tongji University"},{"key":"ref5","first-page":"82","article-title":"Design and Implementation of Multiport High-speed Texture Cache Based on AXI Interface [J]","volume":"2018","author":"yuxin","year":"0","journal-title":"Information and Communication"},{"key":"ref8","year":"0","journal-title":"TMS320C6457 DSP External Memory Interface (EMIF) Texas Instruments"},{"key":"ref7","article-title":"Design of EMIF Interface Based on DSP [D]","author":"fan","year":"2017","journal-title":"Southeast University"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCSP.2016.7754337"},{"key":"ref9","author":"guiyuan","year":"0","journal-title":"2Design Of SSD Storage Control Circuit Based On High-speed Inerface China Communications SystemCo Ltd Hebei Branch Shijiazhuang 050081 China"},{"key":"ref1","first-page":"61","article-title":"Design of High Speed and High Reliability SPI Interface [J]","volume":"5","author":"cheng","year":"2019","journal-title":"Information and Communication"}],"event":{"name":"2021 IEEE 21st International Conference on Communication Technology (ICCT)","location":"Tianjin, China","start":{"date-parts":[[2021,10,13]]},"end":{"date-parts":[[2021,10,16]]}},"container-title":["2021 IEEE 21st International Conference on Communication Technology (ICCT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9657830\/9657831\/09658046.pdf?arnumber=9658046","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T16:56:23Z","timestamp":1652201783000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9658046\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,10,13]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/icct52962.2021.9658046","relation":{},"subject":[],"published":{"date-parts":[[2021,10,13]]}}}