{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T21:46:01Z","timestamp":1730238361757,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,4,23]],"date-time":"2024-04-23T00:00:00Z","timestamp":1713830400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,4,23]],"date-time":"2024-04-23T00:00:00Z","timestamp":1713830400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,4,23]]},"DOI":"10.1109\/icdcs59278.2024.10560788","type":"proceedings-article","created":{"date-parts":[[2024,6,26]],"date-time":"2024-06-26T17:52:00Z","timestamp":1719424320000},"page":"169-173","source":"Crossref","is-referenced-by-count":0,"title":["Design of Content-Addressable Memory for Big Data Applications Using 18nm FINFET Technology"],"prefix":"10.1109","author":[{"given":"Malathi","family":"D","sequence":"first","affiliation":[{"name":"Kongu Engineering College,Department of Electronics and Communication Engineering,Erode,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Saranya M","family":"D","sequence":"additional","affiliation":[{"name":"KPR Institute of Engineering and Technology,Department of Electronics and Communication Engineering,Coimbatore,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ponmurugan","family":"P","sequence":"additional","affiliation":[{"name":"Meenakshi Academy of Higher Education &#x0026; Research, (Deemed to be Univeristy),Chennai,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Revathi","family":"S","sequence":"additional","affiliation":[{"name":"Kongunadu College of Engineering and Technology,Department of Electrical and Electronics Engineering,Trichy,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kavin Kumar","family":"K","sequence":"additional","affiliation":[{"name":"Kongu Engineering College,Department of Electronics and Communication Engineering,Erode,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Malavika","family":"S","sequence":"additional","affiliation":[{"name":"Kongu Engineering College,Department of Electronics and Communication Engineering,Erode,India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/AISP57993.2023.10134833"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TNET.2016.2533613"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2015.69"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2014.7082808"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.5772\/intechopen.69188"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-017-0628-0"},{"journal-title":"FinFET Based Low Power Content Addressable Memory","author":"Jothi","key":"ref7"},{"issue":"14","key":"ref8","first-page":"1","article-title":"Comparative analysis of various adiabatic logic techniques","volume":"6","author":"Ishwarya","year":"2018","journal-title":"Int J Eng Res Technol"},{"issue":"2","key":"ref9","first-page":"1","article-title":"Adiabatic memories: a review","volume":"37","author":"Bala","year":"2006","journal-title":"Electron Technology: Internet Journal"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1049\/rpg2.12760"},{"issue":"10","key":"ref11","first-page":"2789","article-title":"An Efficient Method for Brain Tumor Detection Using Texture Features and SVM Classifier in MR Images","volume":"19","author":"Kavin","year":"2018","journal-title":"PubMed"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.32604\/csse.2023.033927"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.3233\/jifs-201691"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1149\/10701.12841ecst"},{"issue":"9","key":"ref15","doi-asserted-by":"crossref","first-page":"5303","DOI":"10.1007\/s00521-019-04039-6","article-title":"Minimization of test time in system on chip using artificial intelligence-based test scheduling techniques","volume":"32","author":"Chandrasekaran","year":"2019","journal-title":"Neural Computing and Applications"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.18280\/ria.350310"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.18280\/jesa.530217"}],"event":{"name":"2024 7th International Conference on Devices, Circuits and Systems (ICDCS)","start":{"date-parts":[[2024,4,23]]},"location":"Coimbatore, India","end":{"date-parts":[[2024,4,24]]}},"container-title":["2024 7th International Conference on Devices, Circuits and Systems (ICDCS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10560478\/10560483\/10560788.pdf?arnumber=10560788","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,6,28]],"date-time":"2024-06-28T04:56:35Z","timestamp":1719550595000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10560788\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,4,23]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/icdcs59278.2024.10560788","relation":{},"subject":[],"published":{"date-parts":[[2024,4,23]]}}}