{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T21:59:29Z","timestamp":1725400769821},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,3]]},"DOI":"10.1109\/iceac.2015.7352166","type":"proceedings-article","created":{"date-parts":[[2015,12,13]],"date-time":"2015-12-13T01:34:05Z","timestamp":1449970445000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["Comparative power-delay performance analysis of threshold logic technologies"],"prefix":"10.1109","author":[{"given":"Furkan","family":"Ercan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ali","family":"Muhtaroglu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20041099"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1023\/B:ALOG.0000031434.48142.a3"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2002.1046254"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1049\/el:19951471"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44989-2_88"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/SCS.2003.1227096"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICEAC.2013.6737647"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1961.5219224"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1269003"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2003.816365"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2000671"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1228784.1228813"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/368122.368903"},{"key":"ref7","first-page":"1","article-title":"Rewiring for threshold logic circuit minimization","author":"lin","year":"2014","journal-title":"Design Automation and Test in Europe Conference and Exhibition (DATE)"},{"key":"ref2","article-title":"Threshold logic using complementary MOS device","author":"hampel","year":"1975","journal-title":"United States Patent"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.1971.5218091"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/4.508261"}],"event":{"name":"2015 International Conference on Energy Aware Computing (ICEAC)","start":{"date-parts":[[2015,3,24]]},"location":"Cairo, Egypt","end":{"date-parts":[[2015,3,26]]}},"container-title":["5th International Conference on Energy Aware Computing Systems & Applications"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7337639\/7352161\/07352166.pdf?arnumber=7352166","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T18:34:25Z","timestamp":1490380465000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7352166\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,3]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/iceac.2015.7352166","relation":{},"subject":[],"published":{"date-parts":[[2015,3]]}}}