{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,24]],"date-time":"2025-03-24T06:39:59Z","timestamp":1742798399258,"version":"3.28.0"},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/icecs.2002.1046230","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T23:45:08Z","timestamp":1056584708000},"page":"571-574","source":"Crossref","is-referenced-by-count":2,"title":["An 800 MHz 0.35 \u03bcm CMOS clock tree and PLL based on a new charge-pump circuit"],"prefix":"10.1109","volume":"2","author":[{"given":"S.","family":"Orcioni","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Conti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"C.","family":"Turchetti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Centorame","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"crossref","first-page":"1715","DOI":"10.1109\/JSSC.1996.542316","article-title":"A 320MHz, 1.5mW @ 1.35V CMOS PLL for microprocessor clock generation","volume":"31","author":"vincent","year":"1996","journal-title":"IEEE Journal of So lid-State Circuits"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/43.602470"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1980.1094619"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"383","DOI":"10.1109\/4.375957","article-title":"A wide-bandwidth low-voltage PLL for PowerPC™ microprocessor","volume":"30","author":"jose","year":"1995","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"ref2","first-page":"255","article-title":"Design of PLL-based clock generation cir-cuits","volume":"sc 22","author":"deog-kyon","year":"1987","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"1951","DOI":"10.1109\/4.808920","article-title":"A 1600 MHz CMOS clock recovery PLL with low-Vdd capability","volume":"34","author":"patrik","year":"1999","journal-title":"IEEE Journal of Solid-State Cir-cuits"}],"event":{"name":"9th International Conference on Electronics, Circuits and Systems (ICECS 2002)","acronym":"ICECS-02","location":"Dubrovnik, Croatia"},"container-title":["9th International Conference on Electronics, Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8101\/22423\/01046230.pdf?arnumber=1046230","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T22:43:46Z","timestamp":1497566626000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1046230\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/icecs.2002.1046230","relation":{},"subject":[]}}