{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T00:07:57Z","timestamp":1773792477531,"version":"3.50.1"},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2007,12,1]],"date-time":"2007-12-01T00:00:00Z","timestamp":1196467200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2007,12,1]],"date-time":"2007-12-01T00:00:00Z","timestamp":1196467200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007,12]]},"DOI":"10.1109\/icecs.2007.4510986","type":"proceedings-article","created":{"date-parts":[[2008,5,5]],"date-time":"2008-05-05T16:21:05Z","timestamp":1210004465000},"page":"287-290","source":"Crossref","is-referenced-by-count":5,"title":["Automatic Generation of VHDL Code for Self-Timed Circuits from Simulink Specifications"],"prefix":"10.1109","author":[{"given":"Maurizio","family":"Tranchero","sequence":"first","affiliation":[{"name":"Dipartimento di Elettronica — Politecnico di Torino, Corso Duca degli Abruzzi, 24 — 10129 Torino — ITALY"}]},{"given":"Leonardo M.","family":"Reyneri","sequence":"additional","affiliation":[{"name":"Dipartimento di Elettronica — Politecnico di Torino, Corso Duca degli Abruzzi, 24 — 10129 Torino — ITALY"}]}],"member":"263","reference":[{"key":"ref10","year":"0","journal-title":"Altera DSP builder"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/5.381846"},{"key":"ref12","article-title":"System timing","author":"seitz","year":"1980","journal-title":"Introduction to (VLSI) Systems"},{"key":"ref13","author":"graphics","year":"1999"},{"key":"ref14","article-title":"De-synchronication: Synthesis of asynchronous circuits from synchronous specifications","volume":"25","author":"cortadella","year":"2006"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2003.1199169"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"171","DOI":"10.1142\/S0218126603000738","article-title":"Simulink-based codesing and cosimulation of a common-rail injector test bench","volume":"12","author":"bellei","year":"2003","journal-title":"Journal of Circuits Systems and Computers"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379030"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1998.666497"},{"key":"ref5","author":"reyneri","year":"0","journal-title":"Codesimulink Reference Manual"},{"key":"ref8","article-title":"EETimes","year":"2006","journal-title":"FPGAs can outperform DSPs says study"},{"key":"ref7","year":"0","journal-title":"Handshake-Solutions ARM996HS product brief"},{"key":"ref2","article-title":"Scanning the technology","volume":"87","author":"berkel","year":"1999","journal-title":"Proceedings of the IEEE"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3385-3"},{"key":"ref9","year":"0","journal-title":"Xilinx System Generator"}],"event":{"name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","location":"Marrakech, Morocco","start":{"date-parts":[[2007,12,11]]},"end":{"date-parts":[[2007,12,14]]}},"container-title":["2007 14th IEEE International Conference on Electronics, Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4456901\/4510892\/04510986.pdf?arnumber=4510986","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,17]],"date-time":"2026-03-17T20:21:31Z","timestamp":1773778891000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/4510986\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,12]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/icecs.2007.4510986","relation":{},"subject":[],"published":{"date-parts":[[2007,12]]}}}