{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,28]],"date-time":"2025-08-28T00:06:30Z","timestamp":1756339590198,"version":"3.44.0"},"reference-count":18,"publisher":"IEEE","license":[{"start":{"date-parts":[[2010,12,1]],"date-time":"2010-12-01T00:00:00Z","timestamp":1291161600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2010,12,1]],"date-time":"2010-12-01T00:00:00Z","timestamp":1291161600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,12]]},"DOI":"10.1109\/icecs.2010.5724550","type":"proceedings-article","created":{"date-parts":[[2011,3,8]],"date-time":"2011-03-08T06:27:36Z","timestamp":1299565656000},"page":"466-469","source":"Crossref","is-referenced-by-count":0,"title":["Design of parallel LDPC interleaver architecture: A bipartite edge coloring approach"],"prefix":"10.1109","author":[{"given":"Awais","family":"Sani","sequence":"first","affiliation":[{"name":"Lab-STICC, Université de Bretagne-Sud, Lorient, France"}]},{"given":"Philippe","family":"Coussy","sequence":"additional","affiliation":[{"name":"Lab-STICC, Université de Bretagne-Sud, Lorient, France"}]},{"given":"Cyrille","family":"Chavet","sequence":"additional","affiliation":[{"name":"Lab-STICC, Université de Bretagne-Sud, Lorient, France"}]},{"given":"Eric","family":"Martin","sequence":"additional","affiliation":[{"name":"Lab-STICC, Université de Bretagne-Sud, Lorient, France"}]}],"member":"263","reference":[{"key":"ref10","first-page":"429","article-title":"Binary de Bruijn on-chip netwok for a flexible multiprocessor LDPC decoder","author":"h","year":"2008","journal-title":"Proc 45th ACM\/IEEE DAC"},{"key":"ref11","article-title":"Interconnection Framework for High-Throughput, Flexible LDPC Decoders","author":"f","year":"2006","journal-title":"Design Automation and Test in Europe Conference and Exhibition"},{"key":"ref12","first-page":"101","article-title":"Graphok és alkalmazásuk a determinánsok és a halmazok elméletére","volume":"34","author":"d","year":"0","journal-title":"Mathematikai és Természettudományi Értzsitö"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/BF00998632"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"540","DOI":"10.1137\/0211043","article-title":"On edge coloring bipartite graphs","volume":"11","author":"r","year":"1982","journal-title":"SIAM Journal on Computing"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2004.833353"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2010.5495535"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5537955"},{"year":"0","key":"ref18"},{"journal-title":"IEEE P802 11n\/D1 0","article-title":"Wireless LAN Medium Access Control and Physical Layer specifications: Enhancements for HigherThroughput","year":"2006","key":"ref4"},{"journal-title":"DVB DocumentA122","article-title":"Frame structure channel coding and modulation for the second generation digital terrestrial television broadcasting system (DVB-T2)","year":"2008","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.817545"},{"key":"ref5","first-page":"100","article-title":"Air interface for fixed and mobile broadband wireless access systems","year":"2005","journal-title":"P802 16e\/D12 Draft"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2005.109"},{"key":"ref7","first-page":"113","article-title":"A FPGA and ASIC implementation of rate 1\/2, 8088-b irregular low density parity check decoder","author":"y","year":"2003","journal-title":"Proc Global Telecommunications Conf"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1981.1056404"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1962.1057683"},{"key":"ref9","first-page":"291","article-title":"Implementation Issues of Scalable LDPC-Decoders","author":"kienle","year":"2003","journal-title":"Proc 3rd Int Symp on Turbo Codes & Related Topics"}],"event":{"name":"2010 17th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2010)","start":{"date-parts":[[2010,12,12]]},"location":"Athens, Greece","end":{"date-parts":[[2010,12,15]]}},"container-title":["2010 17th IEEE International Conference on Electronics, Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5720492\/5724436\/05724550.pdf?arnumber=5724550","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,27]],"date-time":"2025-08-27T18:24:17Z","timestamp":1756319057000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/5724550\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,12]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/icecs.2010.5724550","relation":{},"subject":[],"published":{"date-parts":[[2010,12]]}}}