{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T20:08:05Z","timestamp":1725566885735},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,12]]},"DOI":"10.1109\/icecs.2014.7049931","type":"proceedings-article","created":{"date-parts":[[2015,3,3]],"date-time":"2015-03-03T20:03:03Z","timestamp":1425412983000},"page":"100-103","source":"Crossref","is-referenced-by-count":1,"title":["Extended event-driven modeling of a \u03a3\u0394-fractional-N PLL including non-ideal effects"],"prefix":"10.1109","author":[{"given":"Christian","family":"Hangmann","sequence":"first","affiliation":[{"name":"Sensor Technology Group, University of Paderborn, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christian","family":"Hedayat","sequence":"additional","affiliation":[{"name":"Fraunhofer ENAS, Paderborn, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ulrich","family":"Hilleringmann","sequence":"additional","affiliation":[{"name":"Sensor Technology Group, University of Paderborn, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/26.297861"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1049\/cp:20040529"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.5194\/ars-8-161-2010"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2013.6674647"},{"article-title":"Design and analysis of fractional-n frequency synthesizers for wireless communications","year":"2002","author":"hussein","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1982.1095413"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.829308"},{"article-title":"Desing and analysis of agile frequency synthesizer for software-defined radio applications","year":"2011","author":"osmany","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1999.777881"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511541131"},{"article-title":"Event driven analog modeling for the verification of pll frequency synthesiz-ers","year":"0","author":"wang","key":"ref8"},{"key":"ref7","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-642-36329-0","author":"fakhfakh","year":"2013","journal-title":"AnaloglRF and Mixed-Signal Circuit Systematic Design"},{"article-title":"Analysis and design of high order digital phase locked loops","year":"2008","author":"daniels","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008326315191"},{"article-title":"Predicting the Phase Noise and Jitter of PLL-Based Frequency Synthesizers","year":"2012","author":"kundert","key":"ref9"}],"event":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","start":{"date-parts":[[2014,12,7]]},"location":"Marseille, France","end":{"date-parts":[[2014,12,10]]}},"container-title":["2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7041007\/7049902\/07049931.pdf?arnumber=7049931","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,6,7]],"date-time":"2021-06-07T21:35:58Z","timestamp":1623101758000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7049931\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,12]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/icecs.2014.7049931","relation":{},"subject":[],"published":{"date-parts":[[2014,12]]}}}