{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T22:35:53Z","timestamp":1729636553339,"version":"3.28.0"},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,12]]},"DOI":"10.1109\/icecs.2015.7440333","type":"proceedings-article","created":{"date-parts":[[2016,3,29]],"date-time":"2016-03-29T20:53:22Z","timestamp":1459284802000},"page":"400-403","source":"Crossref","is-referenced-by-count":1,"title":["Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter"],"prefix":"10.1109","author":[{"given":"Taehui","family":"Na","sequence":"first","affiliation":[]},{"given":"Hanwool","family":"Jeong","sequence":"additional","affiliation":[]},{"given":"Seong-Ook","family":"Jung","sequence":"additional","affiliation":[]},{"given":"Jung Pill","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Seung H.","family":"Kang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/16.711362"},{"key":"ref11","first-page":"279","article-title":"45 nm low power CMOS logic compatible embedded STT MRAM utilizing a reverse-connection 1 T\/1MTJ cell","author":"lin","year":"2009","journal-title":"IEEE Int Electron Devices Meeting (IEDM) Tech Dig"},{"key":"ref12","article-title":"Toggle and spin torque: MRAM at Everspin technologies","author":"rizzo","year":"0","journal-title":"Non-volatile Memories Workshop 2010"},{"key":"ref13","article-title":"Status and challenges for non-volatile spin-transfer torque RAM (STT-RAM)","author":"krounbi","year":"2010","journal-title":"Int Symp Advanced Gate Stack Technology"},{"key":"ref14","first-page":"69","article-title":"Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events","author":"kani","year":"2006","journal-title":"ACM\/IEEE Design Automation Conference"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2008.4681834"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2010.5450410"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2209884"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2001941"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2296136"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391522"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/4.913744"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2088143"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"907","DOI":"10.1109\/TCSII.2008.923411","article-title":"Numerical estimation of yield in sub-100-nm SRAM design using Monte Carlo simulation","volume":"55","author":"nho","year":"2008","journal-title":"IEEE Trans Circuit Syst II"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2247678"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164732"},{"key":"ref2","first-page":"347","article-title":"Variability in sub-100-nm SRAM designs","author":"heald","year":"2004","journal-title":"Proc IEEE\/ACM Int Conf Comput -Aided Des"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2003.815862"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2239320"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2013.6487706"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757457"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2468993"},{"key":"ref24","article-title":"An offset-tolerant dual-reference-voltage sensing scheme for deep submicrometer STT-RAM","author":"na","year":"2015","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2427931"}],"event":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","start":{"date-parts":[[2015,12,6]]},"location":"Cairo, Egypt","end":{"date-parts":[[2015,12,9]]}},"container-title":["2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7430153\/7440163\/07440333.pdf?arnumber=7440333","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T05:32:04Z","timestamp":1498282324000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7440333\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,12]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/icecs.2015.7440333","relation":{},"subject":[],"published":{"date-parts":[[2015,12]]}}}