{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,31]],"date-time":"2025-05-31T04:21:55Z","timestamp":1748665315303,"version":"3.28.0"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,12]]},"DOI":"10.1109\/icecs.2015.7440391","type":"proceedings-article","created":{"date-parts":[[2016,3,29]],"date-time":"2016-03-29T20:53:22Z","timestamp":1459284802000},"page":"613-616","source":"Crossref","is-referenced-by-count":1,"title":["Solving constraints in FPGA detailed routing using SMT"],"prefix":"10.1109","author":[{"given":"Mona","family":"Safar","sequence":"first","affiliation":[]},{"given":"Ashraf","family":"Salem","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403682"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IAdCC.2013.6514241"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"337","DOI":"10.1007\/978-3-540-78800-3_24","article-title":"Z3: An Efficient SMT Solver","author":"de moura","year":"2008","journal-title":"Proceedings of the 14th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS '08)"},{"journal-title":"Z3 Source Code Repository","year":"0","key":"ref13"},{"journal-title":"SEGA FPGA Routing Tool website","year":"0","key":"ref14"},{"article-title":"The SMT-LIB Standard: Version 2.0","year":"2012","author":"barrett","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.1"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-63465-7_226"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2535838.2535857"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/92.678873"},{"journal-title":"Place and Route Tool website","article-title":"VPR FPGA Package","year":"0","key":"ref7"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"674","DOI":"10.1109\/TCAD.2002.1004311","article-title":"A New FPGA Detailed Routing Approach via Search-Based Boolean Satisfiability","volume":"21","author":"nam","year":"2002","journal-title":"IEEE Transactions on CAD"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/267665.267682"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2202326"}],"event":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","start":{"date-parts":[[2015,12,6]]},"location":"Cairo, Egypt","end":{"date-parts":[[2015,12,9]]}},"container-title":["2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7430153\/7440163\/07440391.pdf?arnumber=7440391","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T05:32:03Z","timestamp":1498282323000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7440391\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,12]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/icecs.2015.7440391","relation":{},"subject":[],"published":{"date-parts":[[2015,12]]}}}