{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T22:20:14Z","timestamp":1730240414124,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,12]]},"DOI":"10.1109\/icecs.2017.8292007","type":"proceedings-article","created":{"date-parts":[[2018,3,22]],"date-time":"2018-03-22T20:25:52Z","timestamp":1521750352000},"page":"170-173","source":"Crossref","is-referenced-by-count":2,"title":["Evaluation of NoC on multi-FPGA interconnection using GTX transceiver"],"prefix":"10.1109","author":[{"given":"Atef","family":"Dorai","sequence":"first","affiliation":[]},{"given":"Olivier","family":"Sentieys","sequence":"additional","affiliation":[]},{"given":"Helene","family":"Dubois","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2013.2296301"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2015.2423674"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1016\/j.eswa.2013.06.005"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2013.0034"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2990299.2990317"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2014.6893213"},{"key":"ref6","first-page":"4689","article-title":"A low-power and highspeed quaternary interconnection link using efficient converters","author":"philippe","year":"2005","journal-title":"Proc of the IEEE International Symposium on Circuits and Systems ISCAS' 05"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2902961.2903025"},{"journal-title":"Tech Rep UG885 (v1 7 1)","article-title":"Vc707 evaluation board for the virtex-7 fpga user guide","year":"2016","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2015.2497216"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"28","DOI":"10.1016\/j.micpro.2017.01.006","article-title":"A collision management structure for noc deployment on multi-fpga","volume":"49","author":"dorai","year":"2017","journal-title":"Microprocessors and Microsystems"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2012.6404179"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2013.04.011"}],"event":{"name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","start":{"date-parts":[[2017,12,5]]},"location":"Batumi","end":{"date-parts":[[2017,12,8]]}},"container-title":["2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8283844\/8291994\/08292007.pdf?arnumber=8292007","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T06:54:54Z","timestamp":1643180094000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8292007\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/icecs.2017.8292007","relation":{},"subject":[],"published":{"date-parts":[[2017,12]]}}}