{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,31]],"date-time":"2025-10-31T07:22:25Z","timestamp":1761895345468,"version":"build-2065373602"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,12]]},"DOI":"10.1109\/icecs.2017.8292066","type":"proceedings-article","created":{"date-parts":[[2018,2,22]],"date-time":"2018-02-22T16:14:16Z","timestamp":1519316056000},"page":"381-384","source":"Crossref","is-referenced-by-count":2,"title":["Go functional model for a RISC-V asynchronous organisation \u2014 ARV"],"prefix":"10.1109","author":[{"given":"Marcos L. L.","family":"Sartori","sequence":"first","affiliation":[{"name":"PUCRS-FACIN - Ipiranga Av., 6681 - Porto Alegre - Brazil, 90619-900"}]},{"given":"Ney L. V.","family":"Calazans","sequence":"additional","affiliation":[{"name":"PUCRS-FACIN - Ipiranga Av., 6681 - Porto Alegre - Brazil, 90619-900"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2015.2413759"},{"key":"ref2","first-page":"5.1","article-title":"Low-Power Asynchronous Processors","author":"Slimani","year":"2006","journal-title":"Boca Raton, FL: Taylor and Francis"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3385-3"},{"key":"ref4","article-title":"Communicating Sequential Processes","author":"Hoare","year":"1985","journal-title":"Prentice Hall International"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/359576.359585"},{"key":"ref6","article-title":"Balsa: An asynchronous circuit synthesis system","author":"Bardsley","year":"1998","journal-title":"University of Manchester"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2011.114"},{"key":"ref8","article-title":"CAST: Caltech Asynchronous Synthesis Tools","author":"Martin","year":"2004","journal-title":"California Institute of Technology (CALTECH), Tech. Rep."},{"key":"ref9","article-title":"The RISC-V Instruction Set Manual, Volume I: User-Level ISA, Version 2.1","author":"Waterman","year":"2016","journal-title":"University of California, Berkeley, Tech. Rep. UCB\/EECS- 2016\u2013118"},{"volume-title":"The Go Programming Language","year":"2012","key":"ref10"}],"event":{"name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","start":{"date-parts":[[2017,12,5]]},"location":"Batumi, Georgia","end":{"date-parts":[[2017,12,8]]}},"container-title":["2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8283844\/8291994\/08292066.pdf?arnumber=8292066","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,31]],"date-time":"2025-10-31T05:48:08Z","timestamp":1761889688000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8292066\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/icecs.2017.8292066","relation":{},"subject":[],"published":{"date-parts":[[2017,12]]}}}