{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T22:20:37Z","timestamp":1730240437942,"version":"3.28.0"},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,12]]},"DOI":"10.1109\/icecs.2017.8292092","type":"proceedings-article","created":{"date-parts":[[2018,3,22]],"date-time":"2018-03-22T20:25:52Z","timestamp":1521750352000},"page":"50-53","source":"Crossref","is-referenced-by-count":1,"title":["Smart auto-correction methodology using assertions and dynamic partial reconfiguration"],"prefix":"10.1109","author":[{"given":"Khaled","family":"Salah","sequence":"first","affiliation":[]},{"given":"Mohamed","family":"AbdelSalam","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"1564","article-title":"A scalable formal debugging approach with auto-correction capability based on static slicing and dynamic ranking for RTL datapath designs","volume":"6","author":"behnam","year":"2015","journal-title":"IEEE Transactions on Computers"},{"key":"ref11","article-title":"Mutation Based Debugging Technique with Auto-Correction Mechanism for RTL Designs","author":"behnam","year":"2012","journal-title":"8th International Workshop on Silicon Debug and Diagnosis"},{"key":"ref12","article-title":"Faster mutation-based fault localization with a novel mutation execution strategy","author":"li","year":"2015","journal-title":"Software Testing Verification and Validation Workshops (ICSTW) 2015 IEEE Eighth International Conference"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/ICST.2010.66"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/ICIS.2009.34"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.4218\/etrij.00.0100.0105"},{"key":"ref16","article-title":"Mathematical Modeling of Li-Ion Battery Using Genetic Algorithm Approach for V2G Applications","volume":"29","author":"thirugnanam","year":"2014","journal-title":"IEEE Transactions on Energy Conversion"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1016\/j.mejo.2017.04.007"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"608","DOI":"10.1109\/TSE.2006.83","article-title":"Using Mutation Analysis For Assessing and Comparing Testing Coverage Criteria","volume":"32","author":"namin","year":"2006","journal-title":"IEEE Transactions on Software Engineering"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1109\/TSE.1984.5010248"},{"key":"ref4","article-title":"Efficient online RTL debugging methodology for logic emulation systems","author":"gupta","year":"2012","journal-title":"2012 25th International Conference on VLSI Design"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/ICEAC.2013.6737649"},{"year":"0","journal-title":"Hidden for Blind Review","key":"ref6"},{"key":"ref5","article-title":"Logic emulation with forced assertions: A methodology for rapid functional verification and debug","author":"gupta","year":"2013","journal-title":"Quality Electronic Design (ASQED) 2013 5th Asia Symposium On IEEE"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/ECBS-EERC.2009.19"},{"key":"ref7","article-title":"Synthesis of SystemVerilog Assertions","author":"sayantan","year":"2006","journal-title":"Design Automation and Test in Europe München Germany"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/ICCCAS.2010.5581847"},{"year":"2016","author":"salah","journal-title":"IP Cores Design from Specifications to Production Modeling Verification Optimization and Protection","key":"ref1"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1007\/978-1-4614-7324-4"}],"event":{"name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","start":{"date-parts":[[2017,12,5]]},"location":"Batumi","end":{"date-parts":[[2017,12,8]]}},"container-title":["2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8283844\/8291994\/08292092.pdf?arnumber=8292092","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T07:08:24Z","timestamp":1643180904000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8292092\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/icecs.2017.8292092","relation":{},"subject":[],"published":{"date-parts":[[2017,12]]}}}