{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T15:32:45Z","timestamp":1762011165090,"version":"build-2065373602"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/icecs.2018.8617918","type":"proceedings-article","created":{"date-parts":[[2019,1,24]],"date-time":"2019-01-24T05:16:09Z","timestamp":1548306969000},"page":"357-360","source":"Crossref","is-referenced-by-count":6,"title":["Probabilistic Method for Reliability Estimation of SP- Networks considering Single Event Transient Faults"],"prefix":"10.1109","author":[{"given":"Rafael","family":"Schvittz","sequence":"first","affiliation":[]},{"given":"Denis T.","family":"Franco","sequence":"additional","affiliation":[]},{"given":"Leomar S.","family":"Rosa","sequence":"additional","affiliation":[]},{"given":"Paulo F.","family":"Butzen","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2005.853449"},{"key":"ref11","first-page":"9","author":"gill","year":"2005","journal-title":"Node sensitivity analysis for soft errors in CMOS logic"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/FIE.2008.4720347"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.47"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IranianCEE.2013.6599691"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.dam.2004.03.003"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DTIS.2008.4540217"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2008.23"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2008.4674942"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2010.07.154"},{"key":"ref8","first-page":"59","article-title":"Evaluating circuit reliability under probabilistic gate-level fault models","author":"patel","year":"0","journal-title":"IWLS 2003"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/EDSSC.2013.6628092"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-007-5041-3"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996588"},{"journal-title":"Quality and Reliability of Technical Systems theory Practice Management","year":"2012","author":"birolini","key":"ref9"}],"event":{"name":"2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","start":{"date-parts":[[2018,12,9]]},"location":"Bordeaux","end":{"date-parts":[[2018,12,12]]}},"container-title":["2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8599658\/8617837\/08617918.pdf?arnumber=8617918","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,23]],"date-time":"2020-08-23T22:10:41Z","timestamp":1598220641000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8617918\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/icecs.2018.8617918","relation":{},"subject":[],"published":{"date-parts":[[2018,12]]}}}