{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T22:21:35Z","timestamp":1730240495244,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/icecs.2018.8618023","type":"proceedings-article","created":{"date-parts":[[2019,1,24]],"date-time":"2019-01-24T00:16:09Z","timestamp":1548288969000},"page":"765-768","source":"Crossref","is-referenced-by-count":5,"title":["An Asynchronous Fixed Priority Arbiter for High througput Time Correlated Single Photon Counting Systems"],"prefix":"10.1109","author":[{"given":"Timothe","family":"Turko","sequence":"first","affiliation":[]},{"given":"Wilfried","family":"Uhring","sequence":"additional","affiliation":[]},{"given":"Foudil","family":"Dadouche","sequence":"additional","affiliation":[]},{"given":"Laurent","family":"Fesquet","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"crossref","DOI":"10.1109\/VLSIC.2018.8502386","article-title":"A 252 x 144 SPAD pixel FLASH LiDAR with 1728 Dual-clock 48.8 ps TDCs, Integrated Histogramming and 14.9-to-1 compression in 180nm CMOS Technology","author":"lindner","year":"2018","journal-title":"2018 VLSI symp on circuits"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.5772\/intechopen.72273"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2017.16"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/63526.63532"},{"key":"ref5","article-title":"High-Level Modeling and Design of Asynchronous Arbiters for On-Chip Communication Systems","author":"rigaud","year":"2002","journal-title":"DATE"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"245","DOI":"10.1049\/ip-cdt:20030690","article-title":"Handshake protocol using return-to-zero data encoding for high performance asynchronous bus","volume":"150","author":"jung","year":"2003","journal-title":"IEE Proceedings - Computers and Digital Techniques"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3385-3"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2018.2803087"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1049\/cje.2015.01.001"},{"key":"ref1","first-page":"102120j","article-title":"Time-resolved CMOS SPAD arrays: architectures, applications and perspectives","author":"villa","year":"2017","journal-title":"Proc SPIE 10212"}],"event":{"name":"2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","start":{"date-parts":[[2018,12,9]]},"location":"Bordeaux","end":{"date-parts":[[2018,12,12]]}},"container-title":["2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8599658\/8617837\/08618023.pdf?arnumber=8618023","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,23]],"date-time":"2020-08-23T22:01:49Z","timestamp":1598220109000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8618023\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/icecs.2018.8618023","relation":{},"subject":[],"published":{"date-parts":[[2018,12]]}}}