{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,3]],"date-time":"2025-04-03T09:04:58Z","timestamp":1743671098808},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,10,24]],"date-time":"2022-10-24T00:00:00Z","timestamp":1666569600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,10,24]],"date-time":"2022-10-24T00:00:00Z","timestamp":1666569600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,10,24]]},"DOI":"10.1109\/icecs202256217.2022.9970947","type":"proceedings-article","created":{"date-parts":[[2022,12,12]],"date-time":"2022-12-12T19:50:02Z","timestamp":1670874602000},"page":"1-4","source":"Crossref","is-referenced-by-count":4,"title":["Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology"],"prefix":"10.1109","author":[{"given":"Andre L.","family":"Chinazzo","sequence":"first","affiliation":[{"name":"Technische Universit&#x00E4;t Kaiserslautern,Germany"}]},{"given":"Jan","family":"Lappas","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Kaiserslautern,Germany"}]},{"given":"Christian","family":"Weis","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Kaiserslautern,Germany"}]},{"given":"Qinhui","family":"Huang","sequence":"additional","affiliation":[{"name":"Huawei Technologies Co., Ltd.,Shenzhen,China"}]},{"given":"Zhihang","family":"Wu","sequence":"additional","affiliation":[{"name":"Huawei Technologies Co., Ltd.,Shenzhen,China"}]},{"given":"Leibin","family":"Ni","sequence":"additional","affiliation":[{"name":"Huawei Technologies Co., Ltd.,Shenzhen,China"}]},{"given":"Norbert","family":"Wehn","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Kaiserslautern,Germany"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2820999"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/s42452-021-04640-2"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.2001367"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365766"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774561"},{"key":"ref5","article-title":"Performance evaluation of FinFET pass-transistor full adders with BSIM-CMG model","author":"martin","year":"2014","journal-title":"57th IEEE MWSCAS"},{"key":"ref8","article-title":"Design and analysis of low-power 10-transistor full adders using novel XOR-XNOR gates","author":"bui","year":"0","journal-title":"IEEE TCS II"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-35498-9_19"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-021-01725-6"},{"key":"ref9","article-title":"A review of 0.18um full adder performances for tree structured arithmetic circuits","author":"chang","year":"2005","journal-title":"IEEE Trans on VLSI Systems"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.597298"}],"event":{"name":"2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","start":{"date-parts":[[2022,10,24]]},"location":"Glasgow, United Kingdom","end":{"date-parts":[[2022,10,26]]}},"container-title":["2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9970762\/9970770\/09970947.pdf?arnumber=9970947","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,23]],"date-time":"2023-01-23T20:00:42Z","timestamp":1674504042000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9970947\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,10,24]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/icecs202256217.2022.9970947","relation":{},"subject":[],"published":{"date-parts":[[2022,10,24]]}}}