{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T07:17:58Z","timestamp":1725693478446},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,11,23]],"date-time":"2020-11-23T00:00:00Z","timestamp":1606089600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,11,23]],"date-time":"2020-11-23T00:00:00Z","timestamp":1606089600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,11,23]],"date-time":"2020-11-23T00:00:00Z","timestamp":1606089600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,11,23]]},"DOI":"10.1109\/icecs49266.2020.9294817","type":"proceedings-article","created":{"date-parts":[[2020,12,28]],"date-time":"2020-12-28T20:52:44Z","timestamp":1609188764000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Characterization of Single Event Transient Effects in Standard Delay Cells"],"prefix":"10.1109","author":[{"given":"Marko","family":"Andjelkovic","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Oliver","family":"Schrape","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anselm","family":"Breitenreiter","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Milos","family":"Krstic","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rolf","family":"Kraemer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","article-title":"A Zero-Timing Overhead SET Mitigation Approach for Flash-Based FPGAs","author":"azimi","year":"0","journal-title":"Proc RADECS"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2018.8617996"},{"key":"ref12","article-title":"Circuit-level Hardening Techniques to Mitigate Soft Errors in FinFET Logic Gates","author":"zimpeck","year":"0","journal-title":"Proc RADECS"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2005.61"},{"key":"ref14","article-title":"Use of Pass-Transistor Logic to Minimize the Impact of Soft Errors in Combinational Circuits","author":"kumar","year":"0","journal-title":"Proc SELSE"},{"key":"ref15","article-title":"Gate Sizing to Radiation Harden Combinational Logic","author":"zhou","year":"0","journal-title":"Proc IEEE Trans on Computer-aided Design"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2009.2033798"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1515\/9781400882618-003"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2002.800519"},{"key":"ref6","article-title":"The Effectiveness of TAG or Guard-Gates in SET Supressesion Using Delay and Dual-Rail Configurations at 0.35 &#x00B5;m","author":"shuler","year":"2006","journal-title":"IEEE TNS"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2005.860719"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2006.60"},{"key":"ref7","article-title":"Soft Error Hardened and Multiple Error Tolerant Guarded Dual Modular Redundancy Technique","author":"aketi","year":"0","journal-title":"Proc VLSID"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2014.6861093"},{"journal-title":"Circuit-Level Approaches to Mitigate the Process Variability and Soft Errors in FinFET Logic Cells","year":"2019","author":"zimpeck","key":"ref9"},{"key":"ref1","article-title":"Production and Propagation of Single Event Transients in High-Speed Digital Logic ICs","author":"dodd","year":"2005","journal-title":"IEEE TNS"}],"event":{"name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","start":{"date-parts":[[2020,11,23]]},"location":"Glasgow, UK","end":{"date-parts":[[2020,11,25]]}},"container-title":["2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9294155\/9294779\/09294817.pdf?arnumber=9294817","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,28]],"date-time":"2022-06-28T00:09:29Z","timestamp":1656374969000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9294817\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,11,23]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/icecs49266.2020.9294817","relation":{},"subject":[],"published":{"date-parts":[[2020,11,23]]}}}