{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,11]],"date-time":"2026-02-11T00:23:38Z","timestamp":1770769418015,"version":"3.50.0"},"reference-count":9,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,11,17]],"date-time":"2025-11-17T00:00:00Z","timestamp":1763337600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,11,17]],"date-time":"2025-11-17T00:00:00Z","timestamp":1763337600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,11,17]]},"DOI":"10.1109\/icecs66544.2025.11270621","type":"proceedings-article","created":{"date-parts":[[2025,12,9]],"date-time":"2025-12-09T18:31:34Z","timestamp":1765305094000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["Multi-Modal Explainable Deep Learning-Assisted Signal Integrity Prediction Methodology"],"prefix":"10.1109","author":[{"given":"Jiyoung","family":"Yoon","sequence":"first","affiliation":[{"name":"Samsung Electronics,Memory Division,Hwaseong-si,Republic of Korea,18448"}]},{"given":"Taeryeong","family":"Kim","sequence":"additional","affiliation":[{"name":"Yonsei University,School of Electrical and Electronic Engineering,Seoul,South Korea,03722"}]},{"given":"Ki Chul","family":"Chun","sequence":"additional","affiliation":[{"name":"Samsung Electronics,Memory Division,Hwaseong-si,Republic of Korea,18448"}]},{"given":"Jonghoon","family":"Kim","sequence":"additional","affiliation":[{"name":"Samsung Electronics,Memory Division,Hwaseong-si,Republic of Korea,18448"}]},{"given":"Seong-Ook","family":"Jung","sequence":"additional","affiliation":[{"name":"Yonsei University,School of Electrical and Electronic Engineering,Seoul,South Korea,03722"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2024.3373763"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2948806"},{"key":"ref3","volume-title":"JEDEC DDR5 SDRAM Standard JESD79-5C.01_V1.31, JEDEC Microelectronics Standards Committee","year":"2024"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.23919\/VLSITechnologyandCir57934.2023.10185328"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2883395"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2024.3435419"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TEMC.2021.3081713"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/EPEPS.2017.8329701"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3138978"}],"event":{"name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","location":"Marrakech, Morocco","start":{"date-parts":[[2025,11,17]]},"end":{"date-parts":[[2025,11,19]]}},"container-title":["2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11270487\/11270494\/11270621.pdf?arnumber=11270621","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,2,10]],"date-time":"2026-02-10T20:58:41Z","timestamp":1770757121000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11270621\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,11,17]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/icecs66544.2025.11270621","relation":{},"subject":[],"published":{"date-parts":[[2025,11,17]]}}}