{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T21:04:12Z","timestamp":1725570252345},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,10]]},"DOI":"10.1109\/iceee.2017.8108842","type":"proceedings-article","created":{"date-parts":[[2017,11,28]],"date-time":"2017-11-28T16:40:37Z","timestamp":1511887237000},"page":"1-5","source":"Crossref","is-referenced-by-count":3,"title":["Time-multiplexing cellular neural network in FPGA for image processing"],"prefix":"10.1109","author":[{"given":"J. J.","family":"Morales-Romero","sequence":"first","affiliation":[]},{"given":"F.","family":"Gomez-Castaneda","sequence":"additional","affiliation":[]},{"given":"J.A.","family":"Moreno-Cadenas","sequence":"additional","affiliation":[]},{"given":"M.A.","family":"Reyes-Barranca","sequence":"additional","affiliation":[]},{"given":"L.M.","family":"Flores-Nava","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1994.409612"},{"key":"ref3","article-title":"Cesar: Emulating cellular networks on fpga","author":"jens","year":"2012","journal-title":"12th International Workshop on Cellular Nanoscale Networks and Their Applications"},{"key":"ref6","first-page":"14","article-title":"A Time-Multiplexing simulator for Cellular Neural Network (CNN)","author":"el-shafei","year":"0","journal-title":"Cellular Neural Networks and Their Applications Proceedings 1998 Fitfth IEEE International Workshop on"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1998.703939"},{"key":"ref8","first-page":"7","author":"chua","year":"2004","journal-title":"Cellular Neural Networks and Visual Computing Foundations and Applications"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCCNT.2014.6963142"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/CNNA.2008.4588644"},{"key":"ref9","article-title":"Circuito integrado Análogico CMOS con arquitectura de Red Neuronnal Celular","author":"ezequiel","year":"0","journal-title":"M C I E CINVESTAV México D F"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/31.7600"}],"event":{"name":"2017 14th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)","start":{"date-parts":[[2017,10,20]]},"location":"Mexico City","end":{"date-parts":[[2017,10,22]]}},"container-title":["2017 14th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8098636\/8108823\/08108842.pdf?arnumber=8108842","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,12,21]],"date-time":"2017-12-21T21:58:56Z","timestamp":1513893536000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8108842\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,10]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/iceee.2017.8108842","relation":{},"subject":[],"published":{"date-parts":[[2017,10]]}}}