{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,6]],"date-time":"2024-08-06T17:34:35Z","timestamp":1722965675597},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,9,15]],"date-time":"2021-09-15T00:00:00Z","timestamp":1631664000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,9,15]],"date-time":"2021-09-15T00:00:00Z","timestamp":1631664000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,9,15]],"date-time":"2021-09-15T00:00:00Z","timestamp":1631664000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,9,15]]},"DOI":"10.1109\/icicdt51558.2021.9626482","type":"proceedings-article","created":{"date-parts":[[2021,12,2]],"date-time":"2021-12-02T20:29:35Z","timestamp":1638476975000},"source":"Crossref","is-referenced-by-count":3,"title":["Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper"],"prefix":"10.1109","author":[{"given":"J.","family":"Franco","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H.","family":"Arimura","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.-F.","family":"de Marneffe","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Vandooren","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L.-A","family":"Ragnarsson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Z.","family":"Wu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Claes","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E. Dentoni","family":"Litta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Horiguchi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"K.","family":"Croes","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Linten","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Grasser","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"B.","family":"Kaczer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1063\/1.3110968"},{"key":"ref11","first-page":"1","article-title":"Efficient physical defect model applied to PBTI in high-? stacks","author":"rzepa","year":"2017","journal-title":"Proc Int Reliability Physics Symp (IRPS)"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2014.7047093"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9372054"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1063\/1.371996"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2012.2225625"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1063\/1.56801"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnology18217.2020.9265073"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510618"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2016.7574532"},{"key":"ref5","first-page":"425","article-title":"3-D Self-aligned Stacked NMOS-on-PMOS Nanoribbon Transistors for Continued Moore&#x2019;s Law Scaling","author":"huang","year":"2020","journal-title":"Proc International Electron Devices Meeting (IEDM)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614559"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2018.04.002"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2011.6131506"},{"key":"ref1","first-page":"69","article-title":"3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525&#x00B0;C with improved reliability","author":"vandooren","year":"2019","journal-title":"Proc Symposium on VLSI Technology (VLSI)"},{"key":"ref9","first-page":"1","article-title":"Low temperature atomic hydrogen treatment for superior NBTI reliability&#x2014;Demonstration and modeling across SiO2 IL thicknesses from 1.8 to 0.6 nm for I\/O and Core Logic","author":"franco","year":"2021","journal-title":"Proc Symposium on VLSI Technology (VLSI) TFS2-1"}],"event":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","location":"Dresden, Germany","start":{"date-parts":[[2021,9,15]]},"end":{"date-parts":[[2021,9,17]]}},"container-title":["2021 International Conference on IC Design and Technology (ICICDT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9626390\/9626391\/09626482.pdf?arnumber=9626482","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T16:53:57Z","timestamp":1652201637000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9626482\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,9,15]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/icicdt51558.2021.9626482","relation":{},"subject":[],"published":{"date-parts":[[2021,9,15]]}}}