{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,16]],"date-time":"2026-01-16T17:56:19Z","timestamp":1768586179331,"version":"3.49.0"},"reference-count":10,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,6,23]],"date-time":"2025-06-23T00:00:00Z","timestamp":1750636800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,6,23]],"date-time":"2025-06-23T00:00:00Z","timestamp":1750636800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,6,23]]},"DOI":"10.1109\/icicdt65192.2025.11078043","type":"proceedings-article","created":{"date-parts":[[2025,7,17]],"date-time":"2025-07-17T17:54:49Z","timestamp":1752774889000},"page":"53-56","source":"Crossref","is-referenced-by-count":0,"title":["Design for Reliability of Multi-Bit Operations in RRAM-Based SIMPLY Logic-in-Memory Circuits"],"prefix":"10.1109","author":[{"given":"Tommaso","family":"Zanotti","sequence":"first","affiliation":[{"name":"University of Modena and Reggio Emilia,DIEF,Modena,Italy,41125"}]},{"given":"Erika","family":"Borellini","sequence":"additional","affiliation":[{"name":"University of Modena and Reggio Emilia,DIEF,Modena,Italy,41125"}]},{"given":"Massimo","family":"Vatalaro","sequence":"additional","affiliation":[{"name":"University of Calabria,DIMES,Rende,Italy,87036"}]},{"given":"Vincenzo","family":"Maccaronio","sequence":"additional","affiliation":[{"name":"University of Calabria,DIMES,Rende,Italy,87036"}]},{"given":"Paolo","family":"Pavan","sequence":"additional","affiliation":[{"name":"University of Modena and Reggio Emilia,DIEF,Modena,Italy,41125"}]},{"given":"Raffaele","family":"De Rose","sequence":"additional","affiliation":[{"name":"University of Calabria,DIMES,Rende,Italy,87036"}]},{"given":"Francesco Maria","family":"Puglisi","sequence":"additional","affiliation":[{"name":"University of Modena and Reggio Emilia,DIEF,Modena,Italy,41125"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/jproc.2020.3003007"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/jeds.2020.2987402"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.3390\/mi12101243"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/tcsi.2021.3079986"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.mee.2022.111886"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/access.2023.3344197"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/tcsi.2016.2582203"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2012.2206683"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/tcsi.2024.3432173"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/cicc.2011.6055315"}],"event":{"name":"2025 International Conference on IC Design and Technology (ICICDT)","location":"Lecce, Italy","start":{"date-parts":[[2025,6,23]]},"end":{"date-parts":[[2025,6,25]]}},"container-title":["2025 International Conference on IC Design and Technology (ICICDT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11078014\/11077980\/11078043.pdf?arnumber=11078043","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,16]],"date-time":"2026-01-16T05:24:22Z","timestamp":1768541062000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11078043\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,6,23]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/icicdt65192.2025.11078043","relation":{},"subject":[],"published":{"date-parts":[[2025,6,23]]}}}