{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T07:07:34Z","timestamp":1725606454855},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,3,10]],"date-time":"2021-03-10T00:00:00Z","timestamp":1615334400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,3,10]],"date-time":"2021-03-10T00:00:00Z","timestamp":1615334400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,3,10]]},"DOI":"10.1109\/icit46573.2021.9453496","type":"proceedings-article","created":{"date-parts":[[2021,6,18]],"date-time":"2021-06-18T20:23:57Z","timestamp":1624047837000},"page":"1391-1396","source":"Crossref","is-referenced-by-count":0,"title":["Adaptive Signal Filtering Platform for a CPS\/IoT Ecosystem"],"prefix":"10.1109","author":[{"given":"Haris","family":"Isakovic","sequence":"first","affiliation":[{"name":"Technische Universit&#x00E4;t Wien,Vienna,Austria"}]},{"given":"Stefan","family":"Dangl","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Wien,Vienna,Austria"}]},{"given":"Zlatan","family":"Tucakovic","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Wien,Vienna,Austria"}]},{"given":"Radu","family":"Grosu","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Wien,Vienna,Austria"}]}],"member":"263","reference":[{"year":"0","key":"ref10","article-title":"Terasic - All FPGA Boards - Cyclone II - Altera DE2-70 Board"},{"year":"0","key":"ref11","article-title":"WM8731 &#x2014; Cirrus Logic"},{"year":"0","key":"ref12","article-title":"Wondom DSP Board"},{"year":"0","key":"ref13","article-title":"Early Power Estimators and Power Analyzer"},{"article-title":"High-performance real-time fir-filtering using fast convolution on graphics hardware","year":"2010","author":"wefers","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TASLP.2014.2364452"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1177\/0894439316643050"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.procs.2019.11.146"},{"year":"0","key":"ref4","article-title":"PJRC Store"},{"year":"0","key":"ref3","article-title":"Teensy USB Development Board"},{"year":"0","key":"ref6","article-title":"GNU Octave"},{"journal-title":"The Mathematical Theory of Communication","year":"1949","author":"shannon","key":"ref5"},{"year":"0","key":"ref8","article-title":"FPGA Design Software - Intel&#x00AE; Quartus&#x00AE; Prime"},{"year":"0","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/SEC.2018.00028"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-23703-5_12"},{"year":"0","key":"ref9","article-title":"SigmaStudio&#x00AE; &#x2014; Analog Devices"}],"event":{"name":"2021 22nd IEEE International Conference on Industrial Technology (ICIT)","start":{"date-parts":[[2021,3,10]]},"location":"Valencia, Spain","end":{"date-parts":[[2021,3,12]]}},"container-title":["2021 22nd IEEE International Conference on Industrial Technology (ICIT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9453462\/9453463\/09453496.pdf?arnumber=9453496","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,11,3]],"date-time":"2022-11-03T21:30:45Z","timestamp":1667511045000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9453496\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,3,10]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/icit46573.2021.9453496","relation":{},"subject":[],"published":{"date-parts":[[2021,3,10]]}}}