{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,23]],"date-time":"2026-01-23T15:46:54Z","timestamp":1769183214897,"version":"3.49.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,12]]},"DOI":"10.1109\/icm.2016.7847939","type":"proceedings-article","created":{"date-parts":[[2017,2,9]],"date-time":"2017-02-09T16:43:31Z","timestamp":1486658611000},"page":"181-184","source":"Crossref","is-referenced-by-count":13,"title":["Testing of memristor ratioed logic (MRL) XOR gate"],"prefix":"10.1109","author":[{"given":"A. S.","family":"Emara","sequence":"first","affiliation":[]},{"given":"A. H.","family":"Madian","sequence":"additional","affiliation":[]},{"given":"H. H.","family":"Amer","sequence":"additional","affiliation":[]},{"given":"S. H.","family":"Amer","sequence":"additional","affiliation":[]},{"given":"M. B.","family":"Abdelhalim","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1785481.1785548"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2013.2253329"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2012.2190812"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.4236\/cs.2016.710257"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1996.557076"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/CCECE.2014.6901052"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/NANO.2010.5697869"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1038\/nature06932"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.206"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.66"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176603"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2015.7116247"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"},{"key":"ref1","first-page":"1","article-title":"MRL - Memristor Ratioed Logic","author":"kvatinsky","year":"2012","journal-title":"Proceedings of the International Cellular Nanoscale Networks and Their Applications"},{"key":"ref9","first-page":"1","article-title":"A novel “Divide and Conquer” testing technique for memristor based look up table","author":"hongal","year":"2011","journal-title":"IEEE International Midwest Symposium on Circuits and Systems"}],"event":{"name":"2016 28th International Conference on Microelectronics (ICM)","location":"Giza, Egypt","start":{"date-parts":[[2016,12,17]]},"end":{"date-parts":[[2016,12,20]]}},"container-title":["2016 28th International Conference on Microelectronics (ICM)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7835397\/7847841\/07847939.pdf?arnumber=7847939","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,1]],"date-time":"2017-03-01T17:34:03Z","timestamp":1488389643000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7847939\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,12]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/icm.2016.7847939","relation":{},"subject":[],"published":{"date-parts":[[2016,12]]}}}