{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,13]],"date-time":"2026-01-13T21:40:04Z","timestamp":1768340404504,"version":"3.49.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/icm.2018.8704099","type":"proceedings-article","created":{"date-parts":[[2019,5,2]],"date-time":"2019-05-02T22:49:41Z","timestamp":1556837381000},"page":"56-59","source":"Crossref","is-referenced-by-count":4,"title":["Approximation-Conscious IC Testing"],"prefix":"10.1109","author":[{"given":"Mahmoud","family":"Masadeh","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Osman","family":"Hasan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sofiene","family":"Tahar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","author":"wang","year":"2006","journal-title":"VLSI Test Principles and Architectures Design for Testability"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2017.7934574"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297312"},{"key":"ref13","first-page":"660","article-title":"Inexact Designs for Approximate Low Power Addition by Cell Replacement","author":"haider a f almurib","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041836"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2217962"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IMS3TW.2017.7995210"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2509136.2509546"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228504"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2016.7482460"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2432142"},{"key":"ref7","first-page":"1","article-title":"ABACUS: A technique for automated behavioral synthesis of approximate computing circuits","author":"nepal y li","year":"2014","journal-title":"Design Automation Test in Europe"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2017.7906737"},{"key":"ref1","author":"hennessy","year":"2017","journal-title":"Computer Architecture A Quantitative Approach"},{"key":"ref9","first-page":"146","article-title":"Tests for address decoder delay faults in rams due to inter-gate opens","volume":"2","author":"goor","year":"0","journal-title":"European Test Symposium"}],"event":{"name":"2018 30th International Conference on Microelectronics (ICM)","location":"Sousse, Tunisia","start":{"date-parts":[[2018,12,16]]},"end":{"date-parts":[[2018,12,19]]}},"container-title":["2018 30th International Conference on Microelectronics (ICM)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8698775\/8703878\/08704099.pdf?arnumber=8704099","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,20]],"date-time":"2019-05-20T22:54:02Z","timestamp":1558392842000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8704099\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/icm.2018.8704099","relation":{},"subject":[],"published":{"date-parts":[[2018,12]]}}}