{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:33:21Z","timestamp":1729665201671,"version":"3.28.0"},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007,12]]},"DOI":"10.1109\/icpads.2007.4447729","type":"proceedings-article","created":{"date-parts":[[2008,2,15]],"date-time":"2008-02-15T12:32:18Z","timestamp":1203078738000},"page":"1-8","source":"Crossref","is-referenced-by-count":2,"title":["An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip"],"prefix":"10.1109","author":[{"given":"A.","family":"Yamawaki","sequence":"first","affiliation":[]},{"given":"M.","family":"Iwane","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.1997.644010"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1155\/ES\/2006\/38494"},{"journal-title":"Degital System Lab Embedded MIPS Open Soft Processor Core","year":"2006","key":"ref12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/71.852399"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"598","DOI":"10.1145\/69558.69562","article-title":"I–Structure: Data Structures for Parallel Computing","volume":"11","author":"nikhil","year":"1989","journal-title":"ACM Trans Prog Lang Syst"},{"article-title":"Practical FPGA Programming in C.","year":"2005","author":"pellerin","key":"ref15"},{"key":"ref16","article-title":"Distributed Shared Memory: Concepts and Systems","author":"protic","year":"1997","journal-title":"IEEE Computer Society"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2005.1515769"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/12.859540"},{"key":"ref19","first-page":"1997","article-title":"Dynamically Reconfigurable Processor Implemented with IPFlex's DAPDNA Technology","volume":"e87 d","author":"sugawara","year":"2004","journal-title":"IEICE Trans Inf &Syst"},{"article-title":"Computer Architecture: A Quantitative Approach","year":"2003","author":"hennesy","key":"ref4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.821545"},{"article-title":"MIPS RISC ARCHITECTURE","year":"1992","author":"kane","key":"ref6"},{"article-title":"Multiprocessor Systems-on-chips","year":"2004","author":"jerraya","key":"ref5"},{"article-title":"Reuse Methodology Manual for System-on-a-Chip Designs","year":"2006","author":"keating","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(97)00012-X"},{"year":"2006","key":"ref2","article-title":"MPC8641D Integrated Host Processor Family Reference Manual Rev. 0, 0712006"},{"journal-title":"ARM","article-title":"ARM developer's guide (ARM11 MPCORE multiprocessor semiconductor)","year":"2001","key":"ref1"},{"key":"ref9","first-page":"570","article-title":"Multi-grain Parallel Processing on Compiler Cooperative OSCAR Chip Multiprocessor Architecture","volume":"e86?c","author":"kimura","year":"2003","journal-title":"IEICE Trans on Electronics"},{"journal-title":"Sun Microsystems JBus Architecture Overview Technical Whitepaper Version 1 0y","year":"2003","key":"ref20"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TEXCRA.2004.1425008"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.104"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISPAN.2005.27"},{"key":"ref23","doi-asserted-by":"crossref","first-page":"83","DOI":"10.1109\/ICPADS.2002.1183382","article-title":"Organization of Shared Memory with Synchronization on Multi-processor–on–a–chip","author":"yamawaki","year":"2002","journal-title":"Proc Ninth Int'l Conf Parallel and Distributed Systems"}],"event":{"name":"2007 International Conference on Parallel and Distributed Systems","start":{"date-parts":[[2007,12,5]]},"location":"Hsinchu","end":{"date-parts":[[2007,12,7]]}},"container-title":["2007 International Conference on Parallel and Distributed Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4447704\/4447779\/04447729.pdf?arnumber=4447729","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T00:34:52Z","timestamp":1497746092000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4447729\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,12]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/icpads.2007.4447729","relation":{},"subject":[],"published":{"date-parts":[[2007,12]]}}}