{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T08:56:31Z","timestamp":1725785791189},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,7]]},"DOI":"10.1109\/icsamos.2008.4664863","type":"proceedings-article","created":{"date-parts":[[2008,11,6]],"date-time":"2008-11-06T10:17:49Z","timestamp":1225966669000},"page":"187-194","source":"Crossref","is-referenced-by-count":5,"title":["Reconfigurable design with clock gating"],"prefix":"10.1109","author":[{"given":"W.G.","family":"Osborne","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"W.","family":"Luk","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.G.F.","family":"Coutinho","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"O.","family":"Mencer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2005.1515740"},{"journal-title":"Design guidelines for optimal results in FPGAs","year":"2005","author":"stephenson","key":"17"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.96"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1145\/1150343.1150389"},{"key":"16","first-page":"147","article-title":"automating prouction of run-time reconfigurable designs","author":"shirazi","year":"1998","journal-title":"Proc IEEE Symp Field-Programmable Custom Computing Machines"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2008.39"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2007.7"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1996.564815"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1997.624605"},{"key":"21","doi-asserted-by":"crossref","first-page":"584","DOI":"10.1109\/DSD.2006.32","article-title":"clock-gating in fpgas: a novel and comparative evaluation","author":"zhang","year":"2006","journal-title":"Proc 10th EUROMICRO Conf Digital System Design Architectures Methods and Tools"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2007.51"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-45234-8_98"},{"key":"2","first-page":"283","article-title":"power estimation and power measurement of xilinx virtex fpgas: trade-offs and limitations","author":"becker","year":"2003","journal-title":"Proc 15th Symp Integrated Circuits and Systems Design"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.888404"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.873887"},{"key":"7","doi-asserted-by":"crossref","first-page":"842","DOI":"10.1007\/978-3-540-30117-2_86","article-title":"hardware support for dynamic reconfiguration in reconfigurable soc architectures","author":"griese","year":"2004","journal-title":"Proceedings of the International Conference on Field Programmable Logic and Applications"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2002.1106699"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ICASIC.2003.1277435"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1999.803687"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.884574"},{"key":"8","first-page":"56","article-title":"power considerations in 90nm fpga designs","author":"klein","year":"2005","journal-title":"Xcell Journal"}],"event":{"name":"2008 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","start":{"date-parts":[[2008,7,21]]},"location":"Samos, Greece","end":{"date-parts":[[2008,7,24]]}},"container-title":["2008 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4658786\/4664828\/04664863.pdf?arnumber=4664863","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T09:11:53Z","timestamp":1497777113000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4664863\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,7]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/icsamos.2008.4664863","relation":{},"subject":[],"published":{"date-parts":[[2008,7]]}}}