{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T17:56:05Z","timestamp":1729619765373,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,7]]},"DOI":"10.1109\/icsamos.2010.5642049","type":"proceedings-article","created":{"date-parts":[[2010,11,30]],"date-time":"2010-11-30T16:34:08Z","timestamp":1291134848000},"page":"318-323","source":"Crossref","is-referenced-by-count":6,"title":["SDR platform for 802.11n and 3-GPP LTE"],"prefix":"10.1109","author":[{"given":"Jeroen","family":"Declerck","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Praveen","family":"Raghavan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Frederik","family":"Naessens","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tom Vander","family":"Aa","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lieven","family":"Hollevoet","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Antoine","family":"Dejonghe","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Liesbet","family":"Van der Perre","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771787"},{"key":"ref11","doi-asserted-by":"crossref","first-page":"2613","DOI":"10.1155\/ASP.2005.2613","article-title":"Vector processing as an enabler for software-defined radio in handheld devices","volume":"2005","author":"van berkel","year":"2005","journal-title":"EURASIP J Appl Signal Process"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2007.362"},{"journal-title":"Sandbridge Technologies","year":"0","key":"ref13"},{"key":"ref14","article-title":"The sandblaster 2.0 architecture and sb3500 implementation","author":"moudgill","year":"2008","journal-title":"Proceedings of the Software Defined Radio Technical Forum"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457213"},{"journal-title":"Tensilica ConnX DSP product note","year":"0","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2009.935386"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"61","DOI":"10.1007\/978-3-540-45234-8_7","article-title":"ADRES: An architecture with tightly coupled vliw processor and coarse-grained reconfigurable matrix","author":"mei","year":"2003","journal-title":"Proc IEEE Conf on Field-Programmable Logic and its Applications (FPL)"},{"key":"ref3","article-title":"Design of a low power pre-synchronization asip for multimode sdr terminals","author":"schuster","year":"2007","journal-title":"Proc of SAMOS"},{"key":"ref6","first-page":"166","article-title":"DRESC: A retargetable compiler for coarse-grained reconfigurable architectures","author":"mei","year":"2002","journal-title":"Proc of International Conference on Field Programmable Technology"},{"key":"ref5","article-title":"A coarse-grained array based baseband processor for 100mbps+ software defined radio","author":"bougard","year":"2008","journal-title":"Proc of DATE"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2010.5560292"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.2008.4671733"},{"year":"0","key":"ref2","article-title":"Synopsys system level design tools"},{"key":"ref1","article-title":"A 200mbps+ 2.14nj\/b digital baseband multi processor system-on-chip for sdrs","author":"derudder","year":"2009","journal-title":"Proc VLSI Symp"},{"journal-title":"CEVA DSP Core X1641 Product Note","year":"0","key":"ref9"}],"event":{"name":"2010 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS X)","start":{"date-parts":[[2010,7,19]]},"location":"Samos, Greece","end":{"date-parts":[[2010,7,22]]}},"container-title":["2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5628951\/5642040\/05642049.pdf?arnumber=5642049","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,6,6]],"date-time":"2019-06-06T13:57:13Z","timestamp":1559829433000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5642049\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,7]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/icsamos.2010.5642049","relation":{},"subject":[],"published":{"date-parts":[[2010,7]]}}}