{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,6]],"date-time":"2024-08-06T04:43:57Z","timestamp":1722919437699},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/icsmc.2003.1244575","type":"proceedings-article","created":{"date-parts":[[2004,4,23]],"date-time":"2004-04-23T14:38:15Z","timestamp":1082731095000},"page":"1205-1210","source":"Crossref","is-referenced-by-count":0,"title":["Transformation of VHDL descriptions into DEVS models for fault modeling"],"prefix":"10.1109","volume":"2","author":[{"given":"L.","family":"Capocchi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Bernardi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Federici","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.","family":"Bisgambiglia","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/EURDAC.1996.558242"},{"key":"ref3","article-title":"A modeling and simulation package for classic hierarchical devs","author":"bolduc","year":"2002","journal-title":"Technical Report"},{"key":"ref6","article-title":"Fdevs: A general devs-based formalism for fault modeling and simulation","author":"kofman","year":"2000","journal-title":"In Proceedings of the ESB 2000"},{"key":"ref5","article-title":"Behavioral fault simulation: Implementation and experiment results","author":"federici","year":"2002","journal-title":"In Proceedings of the First IEEE International Workshop on Electronic Design Test and Applications (DELTA 02)"},{"year":"1990","author":"zeigler","article-title":"Object-Oriented Simulation with Hierarchical, Modular Models","key":"ref8"},{"year":"1997","author":"sieh","journal-title":"Comparing different fault models using verify","key":"ref7"},{"year":"2001","author":"ashenden","article-title":"The Designer Guide to VHDL","key":"ref2"},{"year":"2000","author":"zeigler","article-title":"Theory of the Modelinq and Simulation","key":"ref9"},{"key":"ref1","article-title":"The vhdl-cookbook","author":"ashenden","year":"1990","journal-title":"Technical Report"}],"event":{"acronym":"ICSMC-03","name":"SMC '03 2003 IEEE International Conference on Systems, Man and Cybernetics","location":"Washington, DC, USA"},"container-title":["SMC'03 Conference Proceedings. 2003 IEEE International Conference on Systems, Man and Cybernetics. Conference Theme - System Security and Assurance (Cat. No.03CH37483)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8811\/27880\/01244575.pdf?arnumber=1244575","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T19:52:28Z","timestamp":1489434748000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1244575\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/icsmc.2003.1244575","relation":{},"subject":[]}}