{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:20:12Z","timestamp":1729664412599,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/icvd.2004.1261028","type":"proceedings-article","created":{"date-parts":[[2004,6,21]],"date-time":"2004-06-21T21:52:40Z","timestamp":1087854760000},"page":"784-787","source":"Crossref","is-referenced-by-count":12,"title":["Enhancing SAT-based Bounded Model Checking using sequential logic implications"],"prefix":"10.1109","author":[{"given":"R.","family":"Arora","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.S.","family":"Hsiao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"163","DOI":"10.1109\/ICVD.2001.902656","article-title":"A Graph Traversal Based Framework for Sequential Logic Implication With an Application to C-Cycle Redundancy Identification","author":"zhao","year":"2001","journal-title":"Proc VLSI Design Conf"},{"key":"ref11","first-page":"898","article-title":"Improving SAT-based Bounded Model Checking by Means of BDD-based Approximated Traversals","author":"cabodi","year":"2003","journal-title":"Proc DATE"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2003.1183144"},{"key":"ref13","first-page":"117","article-title":"Can BDDs compete with SAT solvers on Bounded Model Checking?","author":"cabodi","year":"2002","journal-title":"Proc DAC"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"418","DOI":"10.1007\/3-540-48683-6_36","article-title":"Model Checking Based On Sequential ATPG","author":"boppana","year":"1999","journal-title":"Proc of Computer Aided Verification"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/5397.5399"},{"journal-title":"Model checking","year":"2000","author":"clarke","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/513918.514120"},{"key":"ref4","first-page":"142","article-title":"Berkrnin: A. Fast and Robust SAT solver","author":"goldberg","year":"2002","journal-title":"Proc DATE"},{"key":"ref3","first-page":"272","article-title":"An Efficient Propositional Prover","volume":"1249","author":"zhang","year":"1997","journal-title":"Proc Design Automated Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-3190-6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/LICS.1990.113767"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2003.1219133"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1999.781333"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"506","DOI":"10.1109\/12.769433","article-title":"GRASP: A Search Algorithm for Propositional Satisfiability","volume":"48","author":"marques-silva","year":"1999","journal-title":"IEEE Trans Computers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2001.156196"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1997.600290"}],"event":{"name":". 17th International Conference on VLSI Design","acronym":"ICVD-04","location":"Mumbai, India"},"container-title":["17th International Conference on VLSI Design. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8911\/28180\/01261028.pdf?arnumber=1261028","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T08:12:10Z","timestamp":1497600730000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1261028\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/icvd.2004.1261028","relation":{},"subject":[]}}