{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T22:07:33Z","timestamp":1725574053409},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,12]]},"DOI":"10.1109\/idt.2011.6123096","type":"proceedings-article","created":{"date-parts":[[2012,1,11]],"date-time":"2012-01-11T22:00:45Z","timestamp":1326319245000},"page":"24-29","source":"Crossref","is-referenced-by-count":3,"title":["On modeling and optimizing cost in 3D Stacked-ICs"],"prefix":"10.1109","author":[{"given":"Mottaqiallah","family":"Taouil","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Said","family":"Hamdioui","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Erik Jan","family":"Marinissen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2009.2017643"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320948"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5653753"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355573"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2009.42"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ETSYM.2010.5512785"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2010.80"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2009.125"},{"article-title":"Entering the Era of ‘Crossover’ SoCs","year":"0","author":"bolsens","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2011.52"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.59"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.92"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306598"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.915429"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1002\/9783527623051"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.136"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.59"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.873612"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2010.80"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457087"},{"article-title":"Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits","year":"2000","author":"bushnell","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2004.836656"}],"event":{"name":"2011 IEEE 6th International Design and Test Workshop (IDT)","start":{"date-parts":[[2011,12,11]]},"location":"Beirut, Lebanon","end":{"date-parts":[[2011,12,14]]}},"container-title":["2011 IEEE 6th International Design and Test Workshop (IDT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6111737\/6123091\/06123096.pdf?arnumber=6123096","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T20:10:38Z","timestamp":1490127038000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6123096\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,12]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/idt.2011.6123096","relation":{},"subject":[],"published":{"date-parts":[[2011,12]]}}}