{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T09:56:07Z","timestamp":1725443767273},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,11]]},"DOI":"10.1109\/iecon.2013.6700010","type":"proceedings-article","created":{"date-parts":[[2014,1,6]],"date-time":"2014-01-06T12:14:59Z","timestamp":1389010499000},"page":"5374-5379","source":"Crossref","is-referenced-by-count":4,"title":["FPGA-based Real-Time Hardware-In-the-Loop validation of a 3-phase PWM rectifier controller"],"prefix":"10.1109","author":[{"given":"M.","family":"Dagbagi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Hemdani","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L.","family":"Idkhajine","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M. W.","family":"Naouar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E.","family":"Monmasson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"I.","family":"Slama-Belkhodja","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"year":"0","key":"13"},{"key":"11","article-title":"Small time-step ( 2?Sec)VSC model for the real time digital simulator","author":"maguire","year":"2005","journal-title":"Presented at the IPST"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/ICIEA.2010.5515585"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ICCDA.2010.5540992"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1016\/S0378-4754(03)00081-8"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2003.818871"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/SPEEDAM.2012.6264543"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ISIE.2011.5984396"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TPWRD.2010.2086499"},{"key":"5","article-title":"An fpga-based hardware-in-The-loop simulator for multilevel converter systems","author":"matar","year":"2011","journal-title":"International Conference on Power Systems Transients (ipst2011) in Delft"},{"key":"4","article-title":"Real-time hardware-in-The-loop (hil) testing for power electronics controllers","author":"tae","year":"2012","journal-title":"Power and Energy Engineering Conference (APPEEC)"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TPWRD.2009.2033603"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/63.318904"}],"event":{"name":"IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society","start":{"date-parts":[[2013,11,10]]},"location":"Vienna, Austria","end":{"date-parts":[[2013,11,13]]}},"container-title":["IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6683943\/6699103\/06700010.pdf?arnumber=6700010","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T19:31:28Z","timestamp":1490211088000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6700010\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,11]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/iecon.2013.6700010","relation":{},"subject":[],"published":{"date-parts":[[2013,11]]}}}