{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,6]],"date-time":"2025-11-06T11:44:42Z","timestamp":1762429482713,"version":"3.37.3"},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,10,31]],"date-time":"2021-10-31T00:00:00Z","timestamp":1635638400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,10,31]],"date-time":"2021-10-31T00:00:00Z","timestamp":1635638400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001871","name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001871","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,10,31]]},"DOI":"10.1109\/ieeeconf53345.2021.9723365","type":"proceedings-article","created":{"date-parts":[[2022,3,4]],"date-time":"2022-03-04T20:26:46Z","timestamp":1646425606000},"page":"1164-1168","source":"Crossref","is-referenced-by-count":2,"title":["On the Performance of Link Space Communications using NB-LDPC Codes on Embedded Parallel Systems"],"prefix":"10.1109","author":[{"given":"Oscar","family":"Ferraz","sequence":"first","affiliation":[{"name":"University of Coimbra and Instituto de Telecomunica&#x00E7;&#x00F5;es,Department of Electrical and Computer Engineering,Coimbra,Portugal,3030-290"}]},{"given":"Vitor","family":"Silva","sequence":"additional","affiliation":[{"name":"University of Coimbra and Instituto de Telecomunica&#x00E7;&#x00F5;es,Department of Electrical and Computer Engineering,Coimbra,Portugal,3030-290"}]},{"given":"Gabriel","family":"Falcao","sequence":"additional","affiliation":[{"name":"University of Coimbra and Instituto de Telecomunica&#x00E7;&#x00F5;es,Department of Electrical and Computer Engineering,Coimbra,Portugal,3030-290"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ITW.2003.1216697"},{"key":"ref11","doi-asserted-by":"crossref","first-page":"2518","DOI":"10.1109\/VETECF.2004.1400507","article-title":"A proof of the Hadamard transform decoding of the belief propagation algorithm for LDPCC over GF(q)","volume":"4","author":"li","year":"2004","journal-title":"IEEE 60th Vehicular Technology Conference 2004 VTC2004-Fall 2004"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2007.894088"},{"key":"ref13","first-page":"1","article-title":"On Belief Propagation Decoding of LDPC Codes over Groups","author":"goupil","year":"2006","journal-title":"4th International Symposium on Turbo Codes Related Topics 6th International ITG-Conference on Source and Channel Coding"},{"journal-title":"Orange Book","article-title":"Short Block length LDPC codes for TC synchronization and channel coding","year":"2015","key":"ref14"},{"article-title":"Introducing the Ultimate Starter AI Computer, the NVIDIA Jetson Nano 2GB Developer Kit","year":"0","author":"sheshadri","key":"ref15"},{"article-title":"NVIDIA Developer Blog: NVIDIA Jetson TX2 Delivers Twice the Intelligence to the Edge","year":"0","author":"franklin","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2014.07.001"},{"year":"2021","key":"ref18","article-title":"NVIDIA Jetson Linux Driver Package Developer Guide"},{"key":"ref19","first-page":"26","article-title":"Optimizing jetson tx2 series modules for power and performance","year":"2020","journal-title":"Jetson TX2 Series Thermal Design Guide"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.3034392"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IEEECONF44664.2019.9048898"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2015.7421423"},{"article-title":"NVIDIA Jetson AGX Xavier Delivers 32 TeraOps for New Era of AI in Robotics","year":"0","author":"franklin","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS50750.2020.9195258"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2013.6638633"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2017.8335517"},{"journal-title":"CCSDS 231 0-B-3","article-title":"TC Synchronization and Channel Coding","year":"2017","key":"ref1"},{"key":"ref9","first-page":"1","article-title":"A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA and GPU Architectures","author":"ferraz","year":"2021","journal-title":"IEEE Communications Surveys Tutorials"},{"key":"ref20","first-page":"20","article-title":"Optimizing jetson agx xavier for power and performance","year":"2021","journal-title":"Jetson AGX Xavier Series Thermal Design Guide"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/GHTC.2018.8601558"}],"event":{"name":"2021 55th Asilomar Conference on Signals, Systems, and Computers","start":{"date-parts":[[2021,10,31]]},"location":"Pacific Grove, CA, USA","end":{"date-parts":[[2021,11,3]]}},"container-title":["2021 55th Asilomar Conference on Signals, Systems, and Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9723034\/9723086\/09723365.pdf?arnumber=9723365","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,15]],"date-time":"2022-06-15T20:16:09Z","timestamp":1655324169000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9723365\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,10,31]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/ieeeconf53345.2021.9723365","relation":{},"subject":[],"published":{"date-parts":[[2021,10,31]]}}}