{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T18:22:17Z","timestamp":1725474137863},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,10]]},"DOI":"10.1109\/igcc.2017.8323601","type":"proceedings-article","created":{"date-parts":[[2018,3,26]],"date-time":"2018-03-26T21:04:39Z","timestamp":1522098279000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["PaSE: A parallel speedup estimation framework for Network-on-Chip based multicore systems"],"prefix":"10.1109","author":[{"given":"Ghassan","family":"Dharb","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Naseef","family":"Mansoor","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sajeed","family":"Shahriat","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Amlan","family":"Ganguly","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICEAC.2010.5702300"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ASICON.2009.5351597"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2474393"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364440"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/90941"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2178620"},{"key":"ref16","first-page":"563","article-title":"An accurate and efficient performance analysis approach based on queuing model for network on chip","author":"mingche","year":"2009","journal-title":"Proc ICCAD'09"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742910"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2014.2360194"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2786572.2786581"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"ref3","first-page":"62","article-title":"Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors","author":"ubal","year":"2007","journal-title":"Computer Architecture and High Performance Computing 2007 SBAC-PAD 2007 19th International Symposium on"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1465482.1465560"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1999946.1999972"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1639562.1639571"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2008.209"},{"key":"ref2","first-page":"746","article-title":"Thousand Core Chips—A Technology Perspective","author":"borkar","year":"2007","journal-title":"Proc 44th ACM\/IEEE Design Automation Conf"},{"key":"ref1","first-page":"88","article-title":"TILE64 - processor: A 64-Core SoC with mesh interconnect","author":"bell","year":"2008","journal-title":"Proceedings of the IEEE International Solid-State Circuits Conference"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2009.05.002"},{"journal-title":"Interconnection Networks An Engineering Approach","year":"2002","author":"duato","key":"ref20"},{"journal-title":"Agner Fog Instruction table","year":"0","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.134"}],"event":{"name":"2017 Eighth International Green and Sustainable Computing Conference (IGSC)","start":{"date-parts":[[2017,10,23]]},"location":"Orlando, FL","end":{"date-parts":[[2017,10,25]]}},"container-title":["2017 Eighth International Green and Sustainable Computing Conference (IGSC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8318503\/8323558\/08323601.pdf?arnumber=8323601","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,4,16]],"date-time":"2018-04-16T20:45:43Z","timestamp":1523911543000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8323601\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,10]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/igcc.2017.8323601","relation":{},"subject":[],"published":{"date-parts":[[2017,10]]}}}