{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,30]],"date-time":"2025-08-30T16:21:08Z","timestamp":1756570868033,"version":"3.43.0"},"reference-count":38,"publisher":"IEEE","license":[{"start":{"date-parts":[[2018,7,1]],"date-time":"2018-07-01T00:00:00Z","timestamp":1530403200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2018,7,1]],"date-time":"2018-07-01T00:00:00Z","timestamp":1530403200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,7]]},"DOI":"10.1109\/ijcnn.2018.8489518","type":"proceedings-article","created":{"date-parts":[[2018,10,19]],"date-time":"2018-10-19T18:25:09Z","timestamp":1539973509000},"page":"1-8","source":"Crossref","is-referenced-by-count":7,"title":["An FPGA-based SOM circuit architecture for online learning of 64-QAM data streams"],"prefix":"10.1109","author":[{"given":"Miguel Angelo","family":"de Abreu de Sousa","sequence":"first","affiliation":[{"name":"Electrical Department, Federal Institute of Education, Science and Technology – IFSP, Sao Paulo, Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ricardo","family":"Pires","sequence":"additional","affiliation":[{"name":"Electrical Department, Federal Institute of Education, Science and Technology – IFSP, Sao Paulo, Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sara D. dos S.","family":"Perseghini","sequence":"additional","affiliation":[{"name":"Electrical Department, Federal Institute of Education, Science and Technology – IFSP, Sao Paulo, Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Emilio","family":"Del-Moral-Hernandez","sequence":"additional","affiliation":[{"name":"Department of Electronic Systems Engineering, School of Engineering, university of Sao Paulo, Sao Paulo, Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref38","first-page":"258","article-title":"An FPGA implementation of the asynchronous programmable neighborhood mechanism for WTM selforganizing map","author":"d?ugosz","year":"2011","journal-title":"In IEEE International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2011)"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1590\/S0104-65002007000100003"},{"journal-title":"SPIB (2013) Signal Processing Information Base","year":"0","key":"ref32"},{"journal-title":"Circuit Design and Simulation With VHDL","year":"2010","author":"pedroni","key":"ref31"},{"key":"ref30","first-page":"1","article-title":"Digital hardware architectures of Kohonen's self organizing feature maps with exponential neighboring function","author":"pe\u00f1a","year":"2006","journal-title":"Intern Conf on Reconf Computing and FPGAs"},{"journal-title":"Discrete-Time Signal Processing","year":"2009","author":"oppenheim","key":"ref37"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/LSP.2005.860544"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TBC.2008.2001145"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/EIT.2009.5189605"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1201\/9781420046076-c24"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/BF00337288"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2003.820834"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.6109\/jicce.2010.8.6.609"},{"key":"ref14","first-page":"1","article-title":"OFDM symbol identification by an unsupervised learning system under dynamically changing channel effects","author":"sousa","year":"2017","journal-title":"Neural Comput and Appl"},{"key":"ref15","first-page":"1","article-title":"Performance of Back-propagation and Self Organizing Map Neural Equalizers for Asymmetrically Clipped Optical OFDM, Proceedings of the 21st","author":"javidi","year":"2013","journal-title":"Iranian Electrical Engineering Conference"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.neunet.2011.09.002"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2015.2398932"},{"key":"ref18","first-page":"3930","article-title":"An FPGA distributed implementation model for embedded SOM with on-line learning","author":"sousa","year":"2017","journal-title":"IEEE International Joint Conference on Neural Networks (IJCNN) Anchorage"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2012.2197077"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.1991.155324"},{"key":"ref4","first-page":"1","article-title":"IEEE Standard for Information technology-Telecommunications and information exchange between systems-Specific requirements - Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer Specifications Amendment 2: Sub 1 GHz License Exempt Operation","year":"2017","journal-title":"in IEEE Std 802 11ah-2016 (Amendment to IEEE Std 802 11-2016 as amended by IEEE Std 802 11ai-2016)"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1214\/aoap\/1177004611"},{"key":"ref3","first-page":"1","article-title":"DVB Guidelines","year":"2015","journal-title":"Frame structure channel coding and modulation for a second generation digital terrestrial television broadcasting system (DVB-T2) DVB Blue Book A122"},{"journal-title":"Communication Systems","year":"2000","author":"haykin","key":"ref6"},{"key":"ref29","first-page":"1062","volume":"2778","author":"zhu","year":"2003","journal-title":"FPGA implementations of neural netwroks - a survey of a decade of"},{"key":"ref5","first-page":"1","article-title":"IEEE Standard for Air Interface for Broadband Wireless Access Systems - Amendment 3: Multi-tier Networks","year":"2015","journal-title":"in IEEE Std 802 16q- 2015 (Amendment to IEEE Std 802 16-2012)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1980.1094608"},{"journal-title":"Digital Communications","year":"2001","author":"proakis","key":"ref7"},{"key":"ref2","first-page":"1","article-title":"DVB Guidelines","year":"2015","journal-title":"Implementation guidelines for a second generation digital cable transmission system (DVB-C2) DVB Blue Book A147"},{"key":"ref9","doi-asserted-by":"crossref","DOI":"10.1201\/9781420013405","author":"radha","year":"2007","journal-title":"WiMAX A Wireless Technology Revolution"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1364\/OFC.2015.Th1B.1"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"33","DOI":"10.1016\/j.micpro.2007.06.004","article-title":"A hardware design of a massive-parallel, modular NN-based vector quantizer for real-time video coding","volume":"32","author":"ramirez-agundis","year":"2008","journal-title":"Microprocessors and Microsystems"},{"article-title":"MATLAB implementations and applications of the selforganizing map","year":"2014","author":"kohonen","key":"ref22"},{"key":"ref21","first-page":"52","article-title":"Essentials of the self-organizing map. Neural networks","volume":"37","author":"kohonen","year":"2013"},{"key":"ref24","first-page":"2042","article-title":"Comparison of three FPGA architectures for embedded multidimensional categorization through Kohonen's Self-organizing maps","author":"sousa","year":"2017","journal-title":"IEEE International Symposium on Circuits and Systems (ISCAS)"},{"article-title":"Neural networks and learning machines","year":"2009","author":"haykin","key":"ref23"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/1497577.1497578"},{"key":"ref25","first-page":"420","article-title":"On the surprising behavior of distance metrics in high dimensional space","volume":"1","author":"aggarwal","year":"2001","journal-title":"Intl Conf on Database Theory"}],"event":{"name":"2018 International Joint Conference on Neural Networks (IJCNN)","start":{"date-parts":[[2018,7,8]]},"location":"Rio de Janeiro, Brazil","end":{"date-parts":[[2018,7,13]]}},"container-title":["2018 International Joint Conference on Neural Networks (IJCNN)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8465565\/8488986\/08489518.pdf?arnumber=8489518","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,4]],"date-time":"2025-08-04T18:38:03Z","timestamp":1754332683000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8489518\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,7]]},"references-count":38,"URL":"https:\/\/doi.org\/10.1109\/ijcnn.2018.8489518","relation":{},"subject":[],"published":{"date-parts":[[2018,7]]}}}