{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T05:27:04Z","timestamp":1730266024581,"version":"3.28.0"},"reference-count":26,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,6,18]],"date-time":"2023-06-18T00:00:00Z","timestamp":1687046400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,18]],"date-time":"2023-06-18T00:00:00Z","timestamp":1687046400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,18]]},"DOI":"10.1109\/ijcnn54540.2023.10191377","type":"proceedings-article","created":{"date-parts":[[2023,8,2]],"date-time":"2023-08-02T13:30:03Z","timestamp":1690983003000},"page":"1-8","source":"Crossref","is-referenced-by-count":1,"title":["FAQ: Mitigating the Impact of Faults in the Weight Memory of DNN Accelerators through Fault-Aware Quantization"],"prefix":"10.1109","author":[{"given":"Muhammad Abdullah","family":"Hanif","sequence":"first","affiliation":[{"name":"New York University Abu Dhabi (NYUAD),Division of Engineering,Abu Dhabi,United Arab Emirates"}]},{"given":"Muhammad","family":"Shafique","sequence":"additional","affiliation":[{"name":"New York University Abu Dhabi (NYUAD),Division of Engineering,Abu Dhabi,United Arab Emirates"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/ISVLSI.2019.00105"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"113","DOI":"10.3390\/fi12070113","article-title":"An updated survey of efficient hardware architectures for accelerating deep convolutional neural networks","volume":"12","author":"capra","year":"2020","journal-title":"Future Internet"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1109\/IOLTS50870.2020.9159749"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/IOLTS.2018.8474192"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/ACCESS.2020.3039858"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/JETCAS.2019.2910232"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1007\/s42979-021-00815-1"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"436","DOI":"10.1038\/nature14539","article-title":"Deep learning","volume":"521","author":"lecun","year":"2015","journal-title":"Nature"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/VTS.2018.8368656"},{"key":"ref16","first-page":"617","article-title":"Chapter 22 - advances in gpu reliability research","author":"wadden","year":"2017","journal-title":"Advances in GPU Research and Practice ser Emerging Trends in Computer Science and Applied Computing"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1109\/ITC44778.2020.9325249"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1109\/MDAT.2019.2915656"},{"doi-asserted-by":"publisher","key":"ref24","DOI":"10.1098\/rsta.2019.0164"},{"doi-asserted-by":"publisher","key":"ref23","DOI":"10.1109\/C-M.1976.218410"},{"year":"0","journal-title":"With cpu chips having billions of transistors what happens if a few go bad?","key":"ref26"},{"year":"0","author":"hruska","journal-title":"Some amd rx 460s can be modded to unlock missing cores additional performance","key":"ref25"},{"doi-asserted-by":"publisher","key":"ref20","DOI":"10.1145\/3352460.3358280"},{"doi-asserted-by":"publisher","key":"ref22","DOI":"10.1145\/3007787.3001165"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.23919\/DATE.2018.8341970"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/JSSC.2016.2616357"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"461","DOI":"10.1145\/3173162.3173176","article-title":"MAERI: Enabling flexible dataflow mapping over dnn accelerators via reconfigurable interconnects","author":"kwon","year":"2018","journal-title":"Proceedings of the third international conference on Architectural support for programming languages and operating systems - ASP"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/ISCA.2016.40"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/DAC18074.2021.9586232"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.23919\/DATE.2018.8342120"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1145\/3079856.3080246"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/JPROC.2017.2761740"}],"event":{"name":"2023 International Joint Conference on Neural Networks (IJCNN)","start":{"date-parts":[[2023,6,18]]},"location":"Gold Coast, Australia","end":{"date-parts":[[2023,6,23]]}},"container-title":["2023 International Joint Conference on Neural Networks (IJCNN)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10190990\/10190992\/10191377.pdf?arnumber=10191377","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,8,21]],"date-time":"2023-08-21T13:41:41Z","timestamp":1692625301000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10191377\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,18]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/ijcnn54540.2023.10191377","relation":{},"subject":[],"published":{"date-parts":[[2023,6,18]]}}}