{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T15:51:13Z","timestamp":1780501873308,"version":"3.54.1"},"reference-count":35,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,6,30]],"date-time":"2025-06-30T00:00:00Z","timestamp":1751241600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,6,30]],"date-time":"2025-06-30T00:00:00Z","timestamp":1751241600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100002701","name":"Ministry of Education","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100002701","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,6,30]]},"DOI":"10.1109\/ijcnn64981.2025.11227379","type":"proceedings-article","created":{"date-parts":[[2025,11,14]],"date-time":"2025-11-14T18:46:15Z","timestamp":1763145975000},"page":"1-9","source":"Crossref","is-referenced-by-count":1,"title":["Automated Graph-level Passes for TinyML Fault Tolerance"],"prefix":"10.1109","author":[{"given":"Johannes","family":"Kappes","sequence":"first","affiliation":[{"name":"TU Wien,Institute of Computer Engineering,Vienna,Austria"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Johannes","family":"Geier","sequence":"additional","affiliation":[{"name":"Technical University of Munich,Chair of Electronic Design Automation,Munich,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Philipp","family":"van Kempen","sequence":"additional","affiliation":[{"name":"Technical University of Munich,Chair of Electronic Design Automation,Munich,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Daniel","family":"Mueller-Gritschneder","sequence":"additional","affiliation":[{"name":"TU Wien,Institute of Computer Engineering,Vienna,Austria"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ulf","family":"Schlichtmann","sequence":"additional","affiliation":[{"name":"Technical University of Munich,Chair of Electronic Design Automation,Munich,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"issue":"4","key":"ref1","doi-asserted-by":"crossref","first-page":"1595","DOI":"10.1016\/j.jksuci.2021.11.019","article-title":"A review on tinyml: State-of-the-art and prospects","volume":"34","author":"Ray","year":"2022","journal-title":"Journal of King Saud University - Computer and Information Sciences"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3615338.3618125"},{"key":"ref3","first-page":"800","article-title":"Tensorflow lite micro: Embedded machine learning for tinyml systems","volume-title":"Proceedings of Machine Learning and Systems","volume":"3","author":"David","year":"2021"},{"key":"ref4","article-title":"Glow: Graph lowering compiler techniques for neural networks","author":"Rotem","year":"2019"},{"key":"ref5","first-page":"578","article-title":"TVM: An automated End-to-End optimizing compiler for deep learning","volume-title":"13th USENIX Symposium on Operating Systems Design and Implementation (OSDI 18)","author":"Chen"},{"key":"ref6","article-title":"Onnx: Open neural network exchange","author":"B","year":"2019"},{"key":"ref7","first-page":"265","article-title":"Tensorflow: a system for large-scale machine learning","volume-title":"Proceedings of the 12th USENIX Conf. on Operating Systems Design and Implementation","author":"Abadi","year":"2016"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/tpds.2020.3043449"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2024.3349956"},{"key":"ref10","volume-title":"Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation","author":"Benso","year":"2010"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2021.3063083"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676475"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/IDT.2013.6727092"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137207"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DSN48987.2021.00018"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2018.00034"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2020.2981056"},{"key":"ref18","article-title":"cudnn: Efficient primitives for deep learning","author":"Chetlur","year":"2014"},{"key":"ref19","article-title":"Cmsis-nn: Efficient neural network kernels for arm cortex-m cpus","author":"Lai","year":"2018"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2019.2928962"},{"key":"ref21","article-title":"An introduction to computational networks and the computational network toolkit","volume-title":"Microsoft Technical Report","author":"Amodei","year":"2014"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3453483.3454083"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3615338.3618121"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2018.00286"},{"key":"ref25","article-title":"Efficient execution of quantized deep learning models: A compiler approach","author":"Jain","year":"2020"},{"key":"ref26","article-title":"Apache TVM GitHub Repository","year":"2024"},{"key":"ref27","article-title":"Fused depthwise tiling for memory optimization in tinyml deep neural network inference","volume":"abs\/2303.17878","author":"Stahl","year":"2023","journal-title":"ArXiv"},{"key":"ref28","article-title":"Mlperf tiny benchmark","author":"Banbury","year":"2021"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3615338.3618128"},{"key":"ref30","first-page":"79","article-title":"The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping","volume-title":"Intl. Symposium on Rapid System Prototyping (RSP)","author":"Mueller-Gritschneder","year":"2017"},{"key":"ref31","article-title":"The RISC-V Instruction Set Manual, Volume I: User-Level ISA, Document Version 20191213","volume-title":"Tech. Rep.","author":"Waterman","year":"2019"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090716"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/DFT52944.2021.9568340"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126964"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.44"}],"event":{"name":"2025 International Joint Conference on Neural Networks (IJCNN)","location":"Rome, Italy","start":{"date-parts":[[2025,6,30]]},"end":{"date-parts":[[2025,7,5]]}},"container-title":["2025 International Joint Conference on Neural Networks (IJCNN)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11227166\/11227148\/11227379.pdf?arnumber=11227379","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,27]],"date-time":"2026-01-27T05:56:22Z","timestamp":1769493382000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11227379\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,6,30]]},"references-count":35,"URL":"https:\/\/doi.org\/10.1109\/ijcnn64981.2025.11227379","relation":{},"subject":[],"published":{"date-parts":[[2025,6,30]]}}}