{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T15:23:14Z","timestamp":1761578594423},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,7]]},"DOI":"10.1109\/iolts.2015.7229852","type":"proceedings-article","created":{"date-parts":[[2015,8,31]],"date-time":"2015-08-31T21:47:56Z","timestamp":1441057676000},"page":"168-170","source":"Crossref","is-referenced-by-count":7,"title":["An effective embedded test &amp;amp; diagnosis solution for external memories"],"prefix":"10.1109","author":[{"given":"G.","family":"Harutyunyan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Y.","family":"Zorian","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2010.5469559"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2012.6401569"},{"key":"ref10","first-page":"758","article-title":"March Based RAM Diagnostic Algorithms for Stuck-At and Coupling Faults","author":"li","year":"2001","journal-title":"IEEE International Test Conference"},{"key":"ref6","first-page":"1","article-title":"Post-Bond Test Techniques for TSVs with Crosstalk Faults in 3D ICs","author":"huang","year":"2012","journal-title":"Proceedings of IEEE International Symposium on VLSI Design Automation and Test"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.98"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654255"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2011.5783749"},{"key":"ref7","first-page":"1","article-title":"A Unified Method for Parametric Fault Characterization of Post-Bond TSVs","author":"lin","year":"2012","journal-title":"IEEE International Test Conference"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2012.6401579"},{"key":"ref9","first-page":"1","article-title":"Interconnect Test for 3D Stacked Memory-on-Logic","author":"taouil","year":"2014","journal-title":"Design Automation and Test in Europe Conference (DATE)"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2010.5699217"}],"event":{"name":"2015 IEEE 21st International On-Line Testing Symposium (IOLTS)","start":{"date-parts":[[2015,7,6]]},"location":"Halkidiki, Greece","end":{"date-parts":[[2015,7,8]]}},"container-title":["2015 IEEE 21st International On-Line Testing Symposium (IOLTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7217973\/7229816\/07229852.pdf?arnumber=7229852","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,25]],"date-time":"2017-03-25T03:12:17Z","timestamp":1490411537000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7229852\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,7]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iolts.2015.7229852","relation":{},"subject":[],"published":{"date-parts":[[2015,7]]}}}