{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T06:22:21Z","timestamp":1730269341462,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,7]]},"DOI":"10.1109\/iolts.2016.7604710","type":"proceedings-article","created":{"date-parts":[[2016,10,24]],"date-time":"2016-10-24T16:24:50Z","timestamp":1477326290000},"page":"239-244","source":"Crossref","is-referenced-by-count":1,"title":["Binary decision diagram to design balanced secure logic styles"],"prefix":"10.1109","author":[{"given":"Hyunmin","family":"Kim","sequence":"first","affiliation":[]},{"given":"Seokhie","family":"Hong","sequence":"additional","affiliation":[]},{"given":"Bart","family":"Preneel","sequence":"additional","affiliation":[]},{"given":"Ingrid","family":"Verbauwhede","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"},{"key":"ref3","first-page":"186","article-title":"A Dynamic Current Mode Logic to Counteract Power Analysis Attacks","author":"mace","year":"2004","journal-title":"DCIS'04"},{"key":"ref10","first-page":"641","article-title":"Designing DPA Resistant Circuits Using BDD Architecture and Bottom Precharge Logic","author":"de","year":"2013","journal-title":"EUROMICRO Conf on DSD"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-01001-9_26"},{"journal-title":"CUDD CU Decision Diagram Package - Release 2 5 0","year":"2012","author":"somenzi","key":"ref11"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.113"},{"year":"0","key":"ref12"},{"key":"ref8","article-title":"BDD Based Synthesis Flow For Design Of DPA Resistant Cryptographic Circuits","author":"manoj","year":"2012","journal-title":"Master Of Science"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-85893-5_15"},{"key":"ref2","first-page":"403","article-title":"A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards","author":"tiri","year":"2002","journal-title":"ESSCIRC'02"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2012.6224315"},{"key":"ref1","first-page":"388","article-title":"Differential Power Analysis","volume":"1666","author":"kocher","year":"1999","journal-title":"CRYPTO'99"}],"event":{"name":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","start":{"date-parts":[[2016,7,4]]},"location":"Sant Feliu de Guixols, Spain","end":{"date-parts":[[2016,7,6]]}},"container-title":["2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7589476\/7604654\/07604710.pdf?arnumber=7604710","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,11,16]],"date-time":"2016-11-16T09:46:44Z","timestamp":1479289604000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7604710\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,7]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/iolts.2016.7604710","relation":{},"subject":[],"published":{"date-parts":[[2016,7]]}}}