{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T06:22:47Z","timestamp":1730269367638,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,7]]},"DOI":"10.1109\/iolts.2018.8474097","type":"proceedings-article","created":{"date-parts":[[2018,10,23]],"date-time":"2018-10-23T00:31:36Z","timestamp":1540254696000},"page":"228-231","source":"Crossref","is-referenced-by-count":1,"title":["A Test Register Assignment Method Based on Controller Augmentation to Reduce the Number of Test Patterns"],"prefix":"10.1109","author":[{"given":"Toshinori","family":"Hosokawa","sequence":"first","affiliation":[]},{"given":"Hiroshi","family":"Yamazaki","sequence":"additional","affiliation":[]},{"given":"Shun","family":"Takeda","sequence":"additional","affiliation":[]},{"given":"Masayoshi","family":"Yoshimura","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"1474","article-title":"Two Test Generation Methods Using a Compacted Test Table and a Compacted Test Plan Table for RTL Data Path Circuits","volume":"e85 d","author":"hosokawa","year":"2002","journal-title":"IEICE Trans Inf & Syst"},{"key":"ref3","first-page":"325","article-title":"RTL Test Point Insertion to Reduce Delay Test Volume","author":"balakrishnam","year":"0","journal-title":"Proc 25th IEEE VLSI TEST Symposium"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008333102734"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/43.55189"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.1013895"},{"key":"ref8","first-page":"347","article-title":"A controller resynthesis based method for improving datapath testability","author":"flottes","year":"2000","journal-title":"IEEE International Symposium on Circuits and Systems"},{"key":"ref7","first-page":"17","article-title":"Controller Augmentation and Test Point Insertion at RTL for Concurrent Operational Unit Testing","author":"hosokawa","year":"2017","journal-title":"IEEE On-Line Testing and Robust System Design"},{"key":"ref2","first-page":"292","article-title":"Test Point Insertion for Compact Test Sets","author":"geuzebroek","year":"0","journal-title":"Proc International Test Conference"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2015.14"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/43.476580"}],"event":{"name":"2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS)","start":{"date-parts":[[2018,7,2]]},"location":"Platja d'Aro","end":{"date-parts":[[2018,7,4]]}},"container-title":["2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8450543\/8474071\/08474097.pdf?arnumber=8474097","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,24]],"date-time":"2020-08-24T03:28:40Z","timestamp":1598239720000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8474097\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,7]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/iolts.2018.8474097","relation":{},"subject":[],"published":{"date-parts":[[2018,7]]}}}