{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,9]],"date-time":"2026-05-09T04:25:13Z","timestamp":1778300713761,"version":"3.51.4"},"reference-count":39,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,6,28]],"date-time":"2021-06-28T00:00:00Z","timestamp":1624838400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,6,28]],"date-time":"2021-06-28T00:00:00Z","timestamp":1624838400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,6,28]],"date-time":"2021-06-28T00:00:00Z","timestamp":1624838400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100004837","name":"Spanish Ministry of Science and Innovation","doi-asserted-by":"publisher","award":["PID2019-107255GB"],"award-info":[{"award-number":["PID2019-107255GB"]}],"id":[{"id":"10.13039\/501100004837","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,6,28]]},"DOI":"10.1109\/iolts52814.2021.9486715","type":"proceedings-article","created":{"date-parts":[[2021,7,27]],"date-time":"2021-07-27T01:11:20Z","timestamp":1627348280000},"page":"1-7","source":"Crossref","is-referenced-by-count":12,"title":["SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping"],"prefix":"10.1109","author":[{"given":"Francisco","family":"Bas","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sergi","family":"Alcaide","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ruben","family":"Lorenzo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guillem","family":"Cabo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guillermo","family":"Gil","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Oriol","family":"Sala","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fabio","family":"Mazzocchetti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Trilla","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jaume","family":"Abella","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2014.6853227"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.3390\/app8030465"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2008.62"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2007.98"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/1899928.1899932"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1999.781037"},{"key":"ref37","year":"2017","journal-title":"Synopsys Announces Industry's First ASIL D Ready Dual-Core Lockstep Processor IP with Integrated Safety Monitor"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00067"},{"key":"ref35","year":"2014","journal-title":"32-bit Power Architecture microcontroller for automotive SIL3\/ASILD chassis and safety applications"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342065"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859631"},{"key":"ref11","article-title":"De-RISC Dependable Real-time Infrastructure for Safety-critical Computer Systems","author":"gomez","year":"2020","journal-title":"Ada User Journal"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-54999-6_2"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.0175"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2434958"},{"key":"ref15","year":"2012","journal-title":"AURIX Multicore 32-bit Microcontroller Family to Meet Safety and Powertrain Requirements of Upcoming Vehicle Generations"},{"key":"ref16","year":"2009"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2018.2799799"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3323917"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2019.00011"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2005.34"},{"key":"ref4","article-title":"A Framework for Adaptive Software-Based Reliability in COTS Many-Core Processors","author":"alhakeem","year":"0","journal-title":"ARCS"},{"key":"ref27","doi-asserted-by":"crossref","first-page":"25","DOI":"10.1145\/339647.339652","article-title":"Transient fault detection via simultaneous multithreading","author":"reinhardt","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DFT50435.2020.9250750"},{"key":"ref6","year":"0","journal-title":"SafetiPin"},{"key":"ref29","doi-asserted-by":"crossref","first-page":"87","DOI":"10.1109\/MDT.2012.2232964","article-title":"Diverse double modular redundancy: A new direction for soft-error detection and correction","volume":"30","author":"pedro","year":"2013","journal-title":"IEEE Design Test"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1984.1659219"},{"key":"ref8","first-page":"2:1","article-title":"TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research","author":"falk","year":"2016","journal-title":"16th International Workshop on Worst-Case Execution Time Analysis (WCET 2016) volume 55 of OpenAccess Series in Informatics (OASIcs)"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1513895.1513907"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2019.8854378"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2013.6621132"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715177"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.13"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2018.00070"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2007.100"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/545214.545227"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2038698.2038719"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2014.2298391"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.194"}],"event":{"name":"2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS)","location":"Torino, Italy","start":{"date-parts":[[2021,6,28]]},"end":{"date-parts":[[2021,6,30]]}},"container-title":["2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9486678\/9486679\/09486715.pdf?arnumber=9486715","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,5]],"date-time":"2023-01-05T15:25:38Z","timestamp":1672932338000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9486715\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,6,28]]},"references-count":39,"URL":"https:\/\/doi.org\/10.1109\/iolts52814.2021.9486715","relation":{},"subject":[],"published":{"date-parts":[[2021,6,28]]}}}