{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,30]],"date-time":"2025-12-30T08:44:58Z","timestamp":1767084298664},"reference-count":27,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,7,3]],"date-time":"2024-07-03T00:00:00Z","timestamp":1719964800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,7,3]],"date-time":"2024-07-03T00:00:00Z","timestamp":1719964800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,7,3]]},"DOI":"10.1109\/iolts60994.2024.10616069","type":"proceedings-article","created":{"date-parts":[[2024,8,5]],"date-time":"2024-08-05T17:32:41Z","timestamp":1722879161000},"page":"1-7","source":"Crossref","is-referenced-by-count":6,"title":["Automatic High Functional Coverage Stimuli Generation for Assertion-based Verification"],"prefix":"10.1109","author":[{"given":"Hossein","family":"Rostami","sequence":"first","affiliation":[{"name":"University of Zanjan,Zanjan,Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mostafa","family":"Hosseini","sequence":"additional","affiliation":[{"name":"University of Zanjan,Zanjan,Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ali","family":"Azarpeyvand","sequence":"additional","affiliation":[{"name":"University of Zanjan,Zanjan,Iran"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mohammad Reza Heidari","family":"Iman","sequence":"additional","affiliation":[{"name":"Tallinn University of Technology,Tallinn,Estonia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tara","family":"Ghasempouri","sequence":"additional","affiliation":[{"name":"Tallinn University of Technology,Tallinn,Estonia"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3510578"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-9228-4"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ECCTD.2015.7300085"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/vlsi-soc.2015.7314424"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.0110"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/565816.503275"},{"key":"ref7","first-page":"755","article-title":"Scalable specification mining for verification and diagnosis","volume-title":"Proceedings Of The 47th Design Automation Conference.","author":"Li"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2019.8920331"},{"key":"ref9","first-page":"3237","article-title":"Fuzzing hardware like software","volume-title":"31st USENIX Security Symposium (USENIX Security 22)","author":"Trippel"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-46681-0_25"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-59418-7_5"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-019-05777-0"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2241176"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858327"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2023.104773"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062206"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3197525"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2380445.2380479"},{"key":"ref19","first-page":"13","article-title":"Assertions and the Verification Landscape. Generating Hardware Assertion Checkers: For Hardware Verification, Emulation","author":"Boule","year":"2008","journal-title":"Post-Fabrication Debugging And On-Line Monitoring"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.3758\/BF03207952"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-0715-7"},{"article-title":"Improving constrained random testing by achieving simulation verification goals through objective functions, rewinding and dynamic seed manipulation","volume-title":"Proceedings Of The Design And Verification Conference And Exhibition US (DVCon)","author":"Nelson","key":"ref22"},{"volume-title":"Accellera,UVM 1.2 UserGuide","year":"2015","key":"ref23"},{"article-title":"Others IEEE Standard for SystemVerilog Unified Hardware Design, Specification, and Verification Language Standard IEEE 1800","year":"2005","author":"Committee","key":"ref24"},{"volume-title":"Project Bonfire Network-on-Chip.","year":"2023","key":"ref26"},{"year":"2023","key":"ref27","article-title":"APB to I2C controller"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-8191(05)80028-6"}],"event":{"name":"2024 IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS)","start":{"date-parts":[[2024,7,3]]},"location":"Rennes, France","end":{"date-parts":[[2024,7,5]]}},"container-title":["2024 IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10616000\/10616049\/10616069.pdf?arnumber=10616069","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,6]],"date-time":"2024-08-06T10:05:05Z","timestamp":1722938705000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10616069\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,7,3]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/iolts60994.2024.10616069","relation":{},"subject":[],"published":{"date-parts":[[2024,7,3]]}}}