{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T10:41:59Z","timestamp":1725532919401},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1109\/ipdps.2002.1016581","type":"proceedings-article","created":{"date-parts":[[2005,8,24]],"date-time":"2005-08-24T23:23:34Z","timestamp":1124925814000},"page":"8 pp","source":"Crossref","is-referenced-by-count":0,"title":["Multi-level modeling of software on hardware in concurrent computation"],"prefix":"10.1109","author":[{"given":"J.M.","family":"Paul","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.J.","family":"Suppe","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H.I.","family":"Adams","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.E.","family":"Thomas","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/280277.280278"},{"key":"ref11","article-title":"Overview of the Ptolemy Project","author":"davis","year":"1999","journal-title":"ERL Technical Report UCB\/ERL No M99\/37 Dept EECS Berkeley"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-6127-9"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/43.736561"},{"year":"0","key":"ref14"},{"year":"0","key":"ref15"},{"key":"ref4","article-title":"Modeling and Evaluation of Hardware\/Software Designs","author":"tibrewala","year":"2001","journal-title":"International Workshop on Hardware\/Software Codesign"},{"key":"ref3","doi-asserted-by":"crossref","DOI":"10.1145\/334012.334037","article-title":"Frequency Interleaving as a Codesign Scheduling Paradigm","author":"paul","year":"2000","journal-title":"International Workshop on Hardware\/Software Codesign"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379015"},{"key":"ref5","doi-asserted-by":"crossref","DOI":"10.1145\/500001.500062","article-title":"Modeling and Simulation of Steady State andTransient Behaviors for Emergent SoCs","author":"paul","year":"2001","journal-title":"International Symposium on System Synthesis"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/EMRTS.2000.854008"},{"key":"ref7","article-title":"Operating System Based Software Generation for Systems-on-chip","author":"desmet","year":"0","journal-title":"DAC00"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337506"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2002.998350"},{"key":"ref9","article-title":"System Timing","author":"seitz","year":"1980","journal-title":"Introduction to VLSI Systems C Mead L Conway"}],"event":{"name":"Proceedings 16th International Parallel and Distributed Processing Symposium. IPDPS 2002","start":{"date-parts":[[2001,4,15]]},"location":"Ft. Lauderdale, FL","end":{"date-parts":[[2001,4,19]]}},"container-title":["Proceedings 16th International Parallel and Distributed Processing Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/7926\/21854\/01016581.pdf?arnumber=1016581","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,7,16]],"date-time":"2021-07-16T13:01:36Z","timestamp":1626440496000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1016581\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/ipdps.2002.1016581","relation":{},"subject":[],"published":{"date-parts":[[2002]]}}}